git.seregonwar.com

DyMain/include/capstone/arc.h

Hermes / DyMain / include / capstone / arc.h

1	#ifndef CAPSTONE_ARC_H
2	#define CAPSTONE_ARC_H
3
4	#ifdef __cplusplus
5	extern "C" {
6	#endif
7
8	#if !defined(_MSC_VER) \|\| !defined(_KERNEL_MODE)
9	#include <stdint.h>
10	#endif
11
12	#include "platform.h"
13	#include "cs_operand.h"
14
15	/// Operand type for instruction's operands
16	typedef enum arc_op_type {
17	ARC_OP_INVALID = CS_OP_INVALID, ///< Invalid
18	ARC_OP_REG = CS_OP_REG, ///< Register operand
19	ARC_OP_IMM = CS_OP_IMM, ///< Immediate operand
20	} arc_op_type;
21
22	/// Instruction operand
23	typedef struct cs_arc_op {
24	arc_op_type type; //< operand type
25	union {
26	unsigned int reg; /// register value for REG operand
27	int64_t imm; /// immediate value for IMM operand
28	};
29
30	/// How is this operand accessed? (READ, WRITE or READ\|WRITE)
31	/// NOTE: this field is irrelevant if engine is compiled in DIET mode.
32	enum cs_ac_type access;
33	} cs_arc_op;
34
35	#define NUM_ARC_OPS 8
36
37	/// Instruction structure
38	typedef struct cs_arc {
39	/// Number of operands of this instruction,
40	/// or 0 when instruction has no operand.
41	uint8_t op_count;
42	cs_arc_op operands[NUM_ARC_OPS]; ///< operands for this instruction.
43	} cs_arc;
44
45	/// ARC registers
46	typedef enum arc_reg {
47	// generated content <ARCGenCSRegEnum.inc> begin
48	// clang-format off
49
50	ARC_REG_INVALID = 0,
51	ARC_REG_BLINK = 1,
52	ARC_REG_FP = 2,
53	ARC_REG_GP = 3,
54	ARC_REG_ILINK = 4,
55	ARC_REG_SP = 5,
56	ARC_REG_R0 = 6,
57	ARC_REG_R1 = 7,
58	ARC_REG_R2 = 8,
59	ARC_REG_R3 = 9,
60	ARC_REG_R4 = 10,
61	ARC_REG_R5 = 11,
62	ARC_REG_R6 = 12,
63	ARC_REG_R7 = 13,
64	ARC_REG_R8 = 14,
65	ARC_REG_R9 = 15,
66	ARC_REG_R10 = 16,
67	ARC_REG_R11 = 17,
68	ARC_REG_R12 = 18,
69	ARC_REG_R13 = 19,
70	ARC_REG_R14 = 20,
71	ARC_REG_R15 = 21,
72	ARC_REG_R16 = 22,
73	ARC_REG_R17 = 23,
74	ARC_REG_R18 = 24,
75	ARC_REG_R19 = 25,
76	ARC_REG_R20 = 26,
77	ARC_REG_R21 = 27,
78	ARC_REG_R22 = 28,
79	ARC_REG_R23 = 29,
80	ARC_REG_R24 = 30,
81	ARC_REG_R25 = 31,
82	ARC_REG_R30 = 32,
83	ARC_REG_R32 = 33,
84	ARC_REG_R33 = 34,
85	ARC_REG_R34 = 35,
86	ARC_REG_R35 = 36,
87	ARC_REG_R36 = 37,
88	ARC_REG_R37 = 38,
89	ARC_REG_R38 = 39,
90	ARC_REG_R39 = 40,
91	ARC_REG_R40 = 41,
92	ARC_REG_R41 = 42,
93	ARC_REG_R42 = 43,
94	ARC_REG_R43 = 44,
95	ARC_REG_R44 = 45,
96	ARC_REG_R45 = 46,
97	ARC_REG_R46 = 47,
98	ARC_REG_R47 = 48,
99	ARC_REG_R48 = 49,
100	ARC_REG_R49 = 50,
101	ARC_REG_R50 = 51,
102	ARC_REG_R51 = 52,
103	ARC_REG_R52 = 53,
104	ARC_REG_R53 = 54,
105	ARC_REG_R54 = 55,
106	ARC_REG_R55 = 56,
107	ARC_REG_R56 = 57,
108	ARC_REG_R57 = 58,
109	ARC_REG_R58 = 59,
110	ARC_REG_R59 = 60,
111	ARC_REG_R60 = 61,
112	ARC_REG_R61 = 62,
113	ARC_REG_R62 = 63,
114	ARC_REG_R63 = 64,
115	ARC_REG_STATUS32 = 65,
116	ARC_REG_ENDING, // 66
117
118	// clang-format on
119	// generated content <ARCGenCSRegEnum.inc> end
120	} arc_reg;
121
122	/// ARC instruction
123	typedef enum arc_insn {
124	// generated content <ARCGenCSInsnEnum.inc> begin
125	// clang-format off
126
127	ARC_INS_INVALID,
128	ARC_INS_h,
129	ARC_INS_PBR,
130	ARC_INS_ERROR_FLS,
131	ARC_INS_ERROR_FFS,
132	ARC_INS_PLDFI,
133	ARC_INS_STB_FAR,
134	ARC_INS_STH_FAR,
135	ARC_INS_ST_FAR,
136	ARC_INS_ADC,
137	ARC_INS_ADC_F,
138	ARC_INS_ADD_S,
139	ARC_INS_ADD,
140	ARC_INS_ADD_F,
141	ARC_INS_AND,
142	ARC_INS_AND_F,
143	ARC_INS_ASL_S,
144	ARC_INS_ASL,
145	ARC_INS_ASL_F,
146	ARC_INS_ASR_S,
147	ARC_INS_ASR,
148	ARC_INS_ASR_F,
149	ARC_INS_BCLR_S,
150	ARC_INS_BEQ_S,
151	ARC_INS_BGE_S,
152	ARC_INS_BGT_S,
153	ARC_INS_BHI_S,
154	ARC_INS_BHS_S,
155	ARC_INS_BL,
156	ARC_INS_BLE_S,
157	ARC_INS_BLO_S,
158	ARC_INS_BLS_S,
159	ARC_INS_BLT_S,
160	ARC_INS_BL_S,
161	ARC_INS_BMSK_S,
162	ARC_INS_BNE_S,
163	ARC_INS_B,
164	ARC_INS_BREQ_S,
165	ARC_INS_BRNE_S,
166	ARC_INS_BR,
167	ARC_INS_BSET_S,
168	ARC_INS_BTST_S,
169	ARC_INS_B_S,
170	ARC_INS_CMP_S,
171	ARC_INS_CMP,
172	ARC_INS_LD_S,
173	ARC_INS_MOV_S,
174	ARC_INS_EI_S,
175	ARC_INS_ENTER_S,
176	ARC_INS_FFS_F,
177	ARC_INS_FFS,
178	ARC_INS_FLS_F,
179	ARC_INS_FLS,
180	ARC_INS_ABS_S,
181	ARC_INS_ADD1_S,
182	ARC_INS_ADD2_S,
183	ARC_INS_ADD3_S,
184	ARC_INS_AND_S,
185	ARC_INS_BIC_S,
186	ARC_INS_BRK_S,
187	ARC_INS_EXTB_S,
188	ARC_INS_EXTH_S,
189	ARC_INS_JEQ_S,
190	ARC_INS_JL_S,
191	ARC_INS_JL_S_D,
192	ARC_INS_JNE_S,
193	ARC_INS_J_S,
194	ARC_INS_J_S_D,
195	ARC_INS_LSR_S,
196	ARC_INS_MPYUW_S,
197	ARC_INS_MPYW_S,
198	ARC_INS_MPY_S,
199	ARC_INS_NEG_S,
200	ARC_INS_NOP_S,
201	ARC_INS_NOT_S,
202	ARC_INS_OR_S,
203	ARC_INS_SEXB_S,
204	ARC_INS_SEXH_S,
205	ARC_INS_SUB_S,
206	ARC_INS_SUB_S_NE,
207	ARC_INS_SWI_S,
208	ARC_INS_TRAP_S,
209	ARC_INS_TST_S,
210	ARC_INS_UNIMP_S,
211	ARC_INS_XOR_S,
212	ARC_INS_LDB_S,
213	ARC_INS_LDH_S,
214	ARC_INS_J,
215	ARC_INS_JL,
216	ARC_INS_JLI_S,
217	ARC_INS_LDB_AB,
218	ARC_INS_LDB_AW,
219	ARC_INS_LDB_DI_AB,
220	ARC_INS_LDB_DI_AW,
221	ARC_INS_LDB_DI,
222	ARC_INS_LDB_X_AB,
223	ARC_INS_LDB_X_AW,
224	ARC_INS_LDB_X_DI_AB,
225	ARC_INS_LDB_X_DI_AW,
226	ARC_INS_LDB_X_DI,
227	ARC_INS_LDB_X,
228	ARC_INS_LDB,
229	ARC_INS_LDH_AB,
230	ARC_INS_LDH_AW,
231	ARC_INS_LDH_DI_AB,
232	ARC_INS_LDH_DI_AW,
233	ARC_INS_LDH_DI,
234	ARC_INS_LDH_S_X,
235	ARC_INS_LDH_X_AB,
236	ARC_INS_LDH_X_AW,
237	ARC_INS_LDH_X_DI_AB,
238	ARC_INS_LDH_X_DI_AW,
239	ARC_INS_LDH_X_DI,
240	ARC_INS_LDH_X,
241	ARC_INS_LDH,
242	ARC_INS_LDI_S,
243	ARC_INS_LD_AB,
244	ARC_INS_LD_AW,
245	ARC_INS_LD_DI_AB,
246	ARC_INS_LD_DI_AW,
247	ARC_INS_LD_DI,
248	ARC_INS_LD_S_AS,
249	ARC_INS_LD,
250	ARC_INS_LEAVE_S,
251	ARC_INS_LR,
252	ARC_INS_LSR,
253	ARC_INS_LSR_F,
254	ARC_INS_MAX,
255	ARC_INS_MAX_F,
256	ARC_INS_MIN,
257	ARC_INS_MIN_F,
258	ARC_INS_MOV_S_NE,
259	ARC_INS_MOV,
260	ARC_INS_MOV_F,
261	ARC_INS_MPYMU,
262	ARC_INS_MPYMU_F,
263	ARC_INS_MPYM,
264	ARC_INS_MPYM_F,
265	ARC_INS_MPY,
266	ARC_INS_MPY_F,
267	ARC_INS_NORMH_F,
268	ARC_INS_NORMH,
269	ARC_INS_NORM_F,
270	ARC_INS_NORM,
271	ARC_INS_OR,
272	ARC_INS_OR_F,
273	ARC_INS_POP_S,
274	ARC_INS_PUSH_S,
275	ARC_INS_ROR,
276	ARC_INS_ROR_F,
277	ARC_INS_RSUB,
278	ARC_INS_RSUB_F,
279	ARC_INS_SBC,
280	ARC_INS_SBC_F,
281	ARC_INS_SETEQ,
282	ARC_INS_SETEQ_F,
283	ARC_INS_SEXB_F,
284	ARC_INS_SEXB,
285	ARC_INS_SEXH_F,
286	ARC_INS_SEXH,
287	ARC_INS_STB_S,
288	ARC_INS_ST_S,
289	ARC_INS_STB_AB,
290	ARC_INS_STB_AW,
291	ARC_INS_STB_DI_AB,
292	ARC_INS_STB_DI_AW,
293	ARC_INS_STB_DI,
294	ARC_INS_STB,
295	ARC_INS_STH_AB,
296	ARC_INS_STH_AW,
297	ARC_INS_STH_DI_AB,
298	ARC_INS_STH_DI_AW,
299	ARC_INS_STH_DI,
300	ARC_INS_STH_S,
301	ARC_INS_STH,
302	ARC_INS_ST_AB,
303	ARC_INS_ST_AW,
304	ARC_INS_ST_DI_AB,
305	ARC_INS_ST_DI_AW,
306	ARC_INS_ST_DI,
307	ARC_INS_ST,
308	ARC_INS_SUB1,
309	ARC_INS_SUB1_F,
310	ARC_INS_SUB2,
311	ARC_INS_SUB2_F,
312	ARC_INS_SUB3,
313	ARC_INS_SUB3_F,
314	ARC_INS_SUB,
315	ARC_INS_SUB_F,
316	ARC_INS_XOR,
317	ARC_INS_XOR_F,
318
319	// clang-format on
320	// generated content <ARCGenCSInsnEnum.inc> end
321	} arc_insn;
322
323	//> Group of ARC instructions
324	typedef enum arc_insn_group {
325	ARC_GRP_INVALID = 0, ///< = CS_GRP_INVALID
326
327	/// Generic groups
328	/// all jump instructions (conditional+direct+indirect jumps)
329	ARC_GRP_JUMP, ///< = CS_GRP_JUMP
330	/// all call instructions
331	ARC_GRP_CALL, ///< = CS_GRP_CALL
332	/// all return instructions
333	ARC_GRP_RET, ///< = CS_GRP_RET
334	/// all relative branching instructions
335	ARC_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE
336
337	ARC_GRP_ENDING,
338	} arc_insn_group;
339
340	#ifdef __cplusplus
341	}
342	#endif
343
344	#endif

Seregon/Hermes