Hermes/Dyforge is a program written in c++ allows you to inject a dll that can analyze all processes in a program, can be used for mod and reverse engeneering
| 1 | #ifndef CAPSTONE_AARCH64_H |
| 2 | #define CAPSTONE_AARCH64_H |
| 3 | |
| 4 | /* Capstone Disassembly Engine */ |
| 5 | /* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */ |
| 6 | |
| 7 | #ifdef __cplusplus |
| 8 | extern "C" { |
| 9 | #endif |
| 10 | |
| 11 | #include "cs_operand.h" |
| 12 | #include "platform.h" |
| 13 | |
| 14 | #include <assert.h> |
| 15 | |
| 16 | #ifdef _MSC_VER |
| 17 | #pragma warning(disable : 4201) |
| 18 | #endif |
| 19 | |
| 20 | /// AArch64 shift type |
| 21 | /// Those values do not correspond to the bit values encoded |
| 22 | /// in the instruction. |
| 23 | typedef enum aarch64_shifter { |
| 24 | AARCH64_SFT_INVALID = 0, |
| 25 | AARCH64_SFT_LSL = 1, |
| 26 | AARCH64_SFT_MSL = 2, |
| 27 | AARCH64_SFT_LSR = 3, |
| 28 | AARCH64_SFT_ASR = 4, |
| 29 | AARCH64_SFT_ROR = 5, |
| 30 | AARCH64_SFT_LSL_REG = 6, |
| 31 | AARCH64_SFT_MSL_REG = 7, |
| 32 | AARCH64_SFT_LSR_REG = 8, |
| 33 | AARCH64_SFT_ASR_REG = 9, |
| 34 | AARCH64_SFT_ROR_REG = 10, |
| 35 | } aarch64_shifter; |
| 36 | |
| 37 | /// AArch64 extender type |
| 38 | typedef enum aarch64_extender { |
| 39 | AARCH64_EXT_INVALID = 0, |
| 40 | AARCH64_EXT_UXTB = 1, |
| 41 | AARCH64_EXT_UXTH = 2, |
| 42 | AARCH64_EXT_UXTW = 3, |
| 43 | AARCH64_EXT_UXTX = 4, |
| 44 | AARCH64_EXT_SXTB = 5, |
| 45 | AARCH64_EXT_SXTH = 6, |
| 46 | AARCH64_EXT_SXTW = 7, |
| 47 | AARCH64_EXT_SXTX = 8, |
| 48 | } aarch64_extender; |
| 49 | |
| 50 | // Moved from AArch64BaseInfo.h and modified |
| 51 | // With extension of Q |
| 52 | typedef enum VectorLayout { |
| 53 | AARCH64LAYOUT_INVALID = 0, |
| 54 | // Bare layout for the 128-bit vector |
| 55 | // (only show ".b", ".h", ".s", ".d" without vector number) |
| 56 | AARCH64LAYOUT_VL_B = 8, |
| 57 | AARCH64LAYOUT_VL_H = 16, |
| 58 | AARCH64LAYOUT_VL_S = 32, |
| 59 | AARCH64LAYOUT_VL_D = 64, |
| 60 | AARCH64LAYOUT_VL_Q = 128, |
| 61 | |
| 62 | AARCH64LAYOUT_VL_4B = (4 << 8) | AARCH64LAYOUT_VL_B, |
| 63 | AARCH64LAYOUT_VL_2H = (2 << 8) | AARCH64LAYOUT_VL_H, |
| 64 | AARCH64LAYOUT_VL_1S = (1 << 8) | AARCH64LAYOUT_VL_S, |
| 65 | |
| 66 | AARCH64LAYOUT_VL_8B = (8 << 8) | AARCH64LAYOUT_VL_B, |
| 67 | AARCH64LAYOUT_VL_4H = (4 << 8) | AARCH64LAYOUT_VL_H, |
| 68 | AARCH64LAYOUT_VL_2S = (2 << 8) | AARCH64LAYOUT_VL_S, |
| 69 | AARCH64LAYOUT_VL_1D = (1 << 8) | AARCH64LAYOUT_VL_D, |
| 70 | |
| 71 | AARCH64LAYOUT_VL_16B = (16 << 8) | AARCH64LAYOUT_VL_B, |
| 72 | AARCH64LAYOUT_VL_8H = (8 << 8) | AARCH64LAYOUT_VL_H, |
| 73 | AARCH64LAYOUT_VL_4S = (4 << 8) | AARCH64LAYOUT_VL_S, |
| 74 | AARCH64LAYOUT_VL_2D = (2 << 8) | AARCH64LAYOUT_VL_D, |
| 75 | AARCH64LAYOUT_VL_1Q = (1 << 8) | AARCH64LAYOUT_VL_Q, |
| 76 | |
| 77 | AARCH64LAYOUT_VL_64B = (64 << 8) | AARCH64LAYOUT_VL_B, |
| 78 | AARCH64LAYOUT_VL_32H = (32 << 8) | AARCH64LAYOUT_VL_H, |
| 79 | AARCH64LAYOUT_VL_16S = (16 << 8) | AARCH64LAYOUT_VL_S, |
| 80 | AARCH64LAYOUT_VL_8D = (8 << 8) | AARCH64LAYOUT_VL_D, |
| 81 | |
| 82 | AARCH64LAYOUT_VL_COMPLETE, ///< Indicates that the complete matrix is used. |
| 83 | } AArch64Layout_VectorLayout; |
| 84 | |
| 85 | // begin namespace AArch64CC |
| 86 | |
| 87 | // Moved from AArch64BaseInfo.h |
| 88 | // The CondCodes constants map directly to the 4-bit encoding of the condition |
| 89 | // field for predicated instructions. |
| 90 | typedef enum AArch64CondCode { // Meaning (integer) Meaning (floating-point) |
| 91 | AArch64CC_EQ = 0x0, // Equal Equal |
| 92 | AArch64CC_NE = 0x1, // Not equal Not equal, or unordered |
| 93 | AArch64CC_HS = 0x2, // Unsigned higher or same >, ==, or unordered |
| 94 | AArch64CC_LO = 0x3, // Unsigned lower Less than |
| 95 | AArch64CC_MI = 0x4, // Minus, negative Less than |
| 96 | AArch64CC_PL = 0x5, // Plus, positive or zero >, ==, or unordered |
| 97 | AArch64CC_VS = 0x6, // Overflow Unordered |
| 98 | AArch64CC_VC = 0x7, // No overflow Not unordered |
| 99 | AArch64CC_HI = 0x8, // Unsigned higher Greater than, or unordered |
| 100 | AArch64CC_LS = 0x9, // Unsigned lower or same Less than or equal |
| 101 | AArch64CC_GE = 0xa, // Greater than or equal Greater than or equal |
| 102 | AArch64CC_LT = 0xb, // Less than Less than, or unordered |
| 103 | AArch64CC_GT = 0xc, // Greater than Greater than |
| 104 | AArch64CC_LE = 0xd, // Less than or equal <, ==, or unordered |
| 105 | AArch64CC_AL = 0xe, // Always (unconditional) Always (unconditional) |
| 106 | AArch64CC_NV = 0xf, // Always (unconditional) Always (unconditional) |
| 107 | // Note the NV exists purely to disassemble 0b1111. Execution is "always". |
| 108 | AArch64CC_Invalid, |
| 109 | |
| 110 | // Common aliases used for SVE. |
| 111 | AArch64CC_ANY_ACTIVE = AArch64CC_NE, // (!Z) |
| 112 | AArch64CC_FIRST_ACTIVE = AArch64CC_MI, // ( N) |
| 113 | AArch64CC_LAST_ACTIVE = AArch64CC_LO, // (!C) |
| 114 | AArch64CC_NONE_ACTIVE = AArch64CC_EQ, // ( Z) |
| 115 | } AArch64CC_CondCode; |
| 116 | |
| 117 | inline static const char *AArch64CC_getCondCodeName(AArch64CC_CondCode Code) |
| 118 | { |
| 119 | switch (Code) { |
| 120 | default: |
| 121 | assert(0 && "Unknown condition code"); |
| 122 | case AArch64CC_EQ: |
| 123 | return "eq"; |
| 124 | case AArch64CC_NE: |
| 125 | return "ne"; |
| 126 | case AArch64CC_HS: |
| 127 | return "hs"; |
| 128 | case AArch64CC_LO: |
| 129 | return "lo"; |
| 130 | case AArch64CC_MI: |
| 131 | return "mi"; |
| 132 | case AArch64CC_PL: |
| 133 | return "pl"; |
| 134 | case AArch64CC_VS: |
| 135 | return "vs"; |
| 136 | case AArch64CC_VC: |
| 137 | return "vc"; |
| 138 | case AArch64CC_HI: |
| 139 | return "hi"; |
| 140 | case AArch64CC_LS: |
| 141 | return "ls"; |
| 142 | case AArch64CC_GE: |
| 143 | return "ge"; |
| 144 | case AArch64CC_LT: |
| 145 | return "lt"; |
| 146 | case AArch64CC_GT: |
| 147 | return "gt"; |
| 148 | case AArch64CC_LE: |
| 149 | return "le"; |
| 150 | case AArch64CC_AL: |
| 151 | return "al"; |
| 152 | case AArch64CC_NV: |
| 153 | return "nv"; |
| 154 | } |
| 155 | } |
| 156 | |
| 157 | inline static AArch64CC_CondCode AArch64CC_getInvertedCondCode(AArch64CC_CondCode Code) |
| 158 | { |
| 159 | // To reverse a condition it's necessary to only invert the low bit: |
| 160 | |
| 161 | return (AArch64CC_CondCode)((unsigned)(Code) ^ 0x1); |
| 162 | } |
| 163 | |
| 164 | /// Given a condition code, return NZCV flags that would satisfy that condition. |
| 165 | /// The flag bits are in the format expected by the ccmp instructions. |
| 166 | /// Note that many different flag settings can satisfy a given condition code, |
| 167 | /// this function just returns one of them. |
| 168 | inline static unsigned AArch64CC_getNZCVToSatisfyCondCode(AArch64CC_CondCode Code) |
| 169 | { |
| 170 | // NZCV flags encoded as expected by ccmp instructions, ARMv8 ISA 5.5.7. |
| 171 | enum { N = 8, Z = 4, C = 2, V = 1 }; |
| 172 | switch (Code) { |
| 173 | default: |
| 174 | assert(0 && "Unknown condition code"); |
| 175 | case AArch64CC_EQ: |
| 176 | return Z; // Z == 1 |
| 177 | case AArch64CC_NE: |
| 178 | return 0; // Z == 0 |
| 179 | case AArch64CC_HS: |
| 180 | return C; // C == 1 |
| 181 | case AArch64CC_LO: |
| 182 | return 0; // C == 0 |
| 183 | case AArch64CC_MI: |
| 184 | return N; // N == 1 |
| 185 | case AArch64CC_PL: |
| 186 | return 0; // N == 0 |
| 187 | case AArch64CC_VS: |
| 188 | return V; // V == 1 |
| 189 | case AArch64CC_VC: |
| 190 | return 0; // V == 0 |
| 191 | case AArch64CC_HI: |
| 192 | return C; // C == 1 && Z == 0 |
| 193 | case AArch64CC_LS: |
| 194 | return 0; // C == 0 || Z == 1 |
| 195 | case AArch64CC_GE: |
| 196 | return 0; // N == V |
| 197 | case AArch64CC_LT: |
| 198 | return N; // N != V |
| 199 | case AArch64CC_GT: |
| 200 | return 0; // Z == 0 && N == V |
| 201 | case AArch64CC_LE: |
| 202 | return Z; // Z == 1 || N != V |
| 203 | } |
| 204 | } |
| 205 | |
| 206 | /// Return true if Code is a reflexive relationship: |
| 207 | /// forall x. (CSET Code (CMP x x)) == 1 |
| 208 | inline static bool AArch64CC_isReflexive(AArch64CC_CondCode Code) |
| 209 | { |
| 210 | switch (Code) { |
| 211 | case AArch64CC_EQ: |
| 212 | case AArch64CC_HS: |
| 213 | case AArch64CC_PL: |
| 214 | case AArch64CC_LS: |
| 215 | case AArch64CC_GE: |
| 216 | case AArch64CC_LE: |
| 217 | case AArch64CC_AL: |
| 218 | case AArch64CC_NV: |
| 219 | return true; |
| 220 | default: |
| 221 | return false; |
| 222 | } |
| 223 | } |
| 224 | |
| 225 | /// Return true if Code is an irreflexive relationship: |
| 226 | /// forall x. (CSET Code (CMP x x)) == 0 |
| 227 | inline static bool AArch64CC_isIrreflexive(AArch64CC_CondCode Code) |
| 228 | { |
| 229 | switch (Code) { |
| 230 | case AArch64CC_NE: |
| 231 | case AArch64CC_LO: |
| 232 | case AArch64CC_MI: |
| 233 | case AArch64CC_HI: |
| 234 | case AArch64CC_LT: |
| 235 | case AArch64CC_GT: |
| 236 | return true; |
| 237 | default: |
| 238 | return false; |
| 239 | } |
| 240 | } |
| 241 | |
| 242 | // end namespace AArch64CC |
| 243 | |
| 244 | typedef enum { |
| 245 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_TLBI> begin |
| 246 | // clang-format off |
| 247 | |
| 248 | AARCH64_TLBI_ALLE1 = 0x243c, |
| 249 | AARCH64_TLBI_ALLE1IS = 0x241c, |
| 250 | AARCH64_TLBI_ALLE1ISNXS = 0x249c, |
| 251 | AARCH64_TLBI_ALLE1NXS = 0x24bc, |
| 252 | AARCH64_TLBI_ALLE1OS = 0x240c, |
| 253 | AARCH64_TLBI_ALLE1OSNXS = 0x248c, |
| 254 | AARCH64_TLBI_ALLE2 = 0x2438, |
| 255 | AARCH64_TLBI_ALLE2IS = 0x2418, |
| 256 | AARCH64_TLBI_ALLE2ISNXS = 0x2498, |
| 257 | AARCH64_TLBI_ALLE2NXS = 0x24b8, |
| 258 | AARCH64_TLBI_ALLE2OS = 0x2408, |
| 259 | AARCH64_TLBI_ALLE2OSNXS = 0x2488, |
| 260 | AARCH64_TLBI_ALLE3 = 0x3438, |
| 261 | AARCH64_TLBI_ALLE3IS = 0x3418, |
| 262 | AARCH64_TLBI_ALLE3ISNXS = 0x3498, |
| 263 | AARCH64_TLBI_ALLE3NXS = 0x34b8, |
| 264 | AARCH64_TLBI_ALLE3OS = 0x3408, |
| 265 | AARCH64_TLBI_ALLE3OSNXS = 0x3488, |
| 266 | AARCH64_TLBI_ASIDE1 = 0x43a, |
| 267 | AARCH64_TLBI_ASIDE1IS = 0x41a, |
| 268 | AARCH64_TLBI_ASIDE1ISNXS = 0x49a, |
| 269 | AARCH64_TLBI_ASIDE1NXS = 0x4ba, |
| 270 | AARCH64_TLBI_ASIDE1OS = 0x40a, |
| 271 | AARCH64_TLBI_ASIDE1OSNXS = 0x48a, |
| 272 | AARCH64_TLBI_IPAS2E1 = 0x2421, |
| 273 | AARCH64_TLBI_IPAS2E1IS = 0x2401, |
| 274 | AARCH64_TLBI_IPAS2E1ISNXS = 0x2481, |
| 275 | AARCH64_TLBI_IPAS2E1NXS = 0x24a1, |
| 276 | AARCH64_TLBI_IPAS2E1OS = 0x2420, |
| 277 | AARCH64_TLBI_IPAS2E1OSNXS = 0x24a0, |
| 278 | AARCH64_TLBI_IPAS2LE1 = 0x2425, |
| 279 | AARCH64_TLBI_IPAS2LE1IS = 0x2405, |
| 280 | AARCH64_TLBI_IPAS2LE1ISNXS = 0x2485, |
| 281 | AARCH64_TLBI_IPAS2LE1NXS = 0x24a5, |
| 282 | AARCH64_TLBI_IPAS2LE1OS = 0x2424, |
| 283 | AARCH64_TLBI_IPAS2LE1OSNXS = 0x24a4, |
| 284 | AARCH64_TLBI_PAALL = 0x343c, |
| 285 | AARCH64_TLBI_PAALLNXS = 0x34bc, |
| 286 | AARCH64_TLBI_PAALLOS = 0x340c, |
| 287 | AARCH64_TLBI_PAALLOSNXS = 0x348c, |
| 288 | AARCH64_TLBI_RIPAS2E1 = 0x2422, |
| 289 | AARCH64_TLBI_RIPAS2E1IS = 0x2402, |
| 290 | AARCH64_TLBI_RIPAS2E1ISNXS = 0x2482, |
| 291 | AARCH64_TLBI_RIPAS2E1NXS = 0x24a2, |
| 292 | AARCH64_TLBI_RIPAS2E1OS = 0x2423, |
| 293 | AARCH64_TLBI_RIPAS2E1OSNXS = 0x24a3, |
| 294 | AARCH64_TLBI_RIPAS2LE1 = 0x2426, |
| 295 | AARCH64_TLBI_RIPAS2LE1IS = 0x2406, |
| 296 | AARCH64_TLBI_RIPAS2LE1ISNXS = 0x2486, |
| 297 | AARCH64_TLBI_RIPAS2LE1NXS = 0x24a6, |
| 298 | AARCH64_TLBI_RIPAS2LE1OS = 0x2427, |
| 299 | AARCH64_TLBI_RIPAS2LE1OSNXS = 0x24a7, |
| 300 | AARCH64_TLBI_RPALOS = 0x3427, |
| 301 | AARCH64_TLBI_RPALOSNXS = 0x34a7, |
| 302 | AARCH64_TLBI_RPAOS = 0x3423, |
| 303 | AARCH64_TLBI_RPAOSNXS = 0x34a3, |
| 304 | AARCH64_TLBI_RVAAE1 = 0x433, |
| 305 | AARCH64_TLBI_RVAAE1IS = 0x413, |
| 306 | AARCH64_TLBI_RVAAE1ISNXS = 0x493, |
| 307 | AARCH64_TLBI_RVAAE1NXS = 0x4b3, |
| 308 | AARCH64_TLBI_RVAAE1OS = 0x42b, |
| 309 | AARCH64_TLBI_RVAAE1OSNXS = 0x4ab, |
| 310 | AARCH64_TLBI_RVAALE1 = 0x437, |
| 311 | AARCH64_TLBI_RVAALE1IS = 0x417, |
| 312 | AARCH64_TLBI_RVAALE1ISNXS = 0x497, |
| 313 | AARCH64_TLBI_RVAALE1NXS = 0x4b7, |
| 314 | AARCH64_TLBI_RVAALE1OS = 0x42f, |
| 315 | AARCH64_TLBI_RVAALE1OSNXS = 0x4af, |
| 316 | AARCH64_TLBI_RVAE1 = 0x431, |
| 317 | AARCH64_TLBI_RVAE1IS = 0x411, |
| 318 | AARCH64_TLBI_RVAE1ISNXS = 0x491, |
| 319 | AARCH64_TLBI_RVAE1NXS = 0x4b1, |
| 320 | AARCH64_TLBI_RVAE1OS = 0x429, |
| 321 | AARCH64_TLBI_RVAE1OSNXS = 0x4a9, |
| 322 | AARCH64_TLBI_RVAE2 = 0x2431, |
| 323 | AARCH64_TLBI_RVAE2IS = 0x2411, |
| 324 | AARCH64_TLBI_RVAE2ISNXS = 0x2491, |
| 325 | AARCH64_TLBI_RVAE2NXS = 0x24b1, |
| 326 | AARCH64_TLBI_RVAE2OS = 0x2429, |
| 327 | AARCH64_TLBI_RVAE2OSNXS = 0x24a9, |
| 328 | AARCH64_TLBI_RVAE3 = 0x3431, |
| 329 | AARCH64_TLBI_RVAE3IS = 0x3411, |
| 330 | AARCH64_TLBI_RVAE3ISNXS = 0x3491, |
| 331 | AARCH64_TLBI_RVAE3NXS = 0x34b1, |
| 332 | AARCH64_TLBI_RVAE3OS = 0x3429, |
| 333 | AARCH64_TLBI_RVAE3OSNXS = 0x34a9, |
| 334 | AARCH64_TLBI_RVALE1 = 0x435, |
| 335 | AARCH64_TLBI_RVALE1IS = 0x415, |
| 336 | AARCH64_TLBI_RVALE1ISNXS = 0x495, |
| 337 | AARCH64_TLBI_RVALE1NXS = 0x4b5, |
| 338 | AARCH64_TLBI_RVALE1OS = 0x42d, |
| 339 | AARCH64_TLBI_RVALE1OSNXS = 0x4ad, |
| 340 | AARCH64_TLBI_RVALE2 = 0x2435, |
| 341 | AARCH64_TLBI_RVALE2IS = 0x2415, |
| 342 | AARCH64_TLBI_RVALE2ISNXS = 0x2495, |
| 343 | AARCH64_TLBI_RVALE2NXS = 0x24b5, |
| 344 | AARCH64_TLBI_RVALE2OS = 0x242d, |
| 345 | AARCH64_TLBI_RVALE2OSNXS = 0x24ad, |
| 346 | AARCH64_TLBI_RVALE3 = 0x3435, |
| 347 | AARCH64_TLBI_RVALE3IS = 0x3415, |
| 348 | AARCH64_TLBI_RVALE3ISNXS = 0x3495, |
| 349 | AARCH64_TLBI_RVALE3NXS = 0x34b5, |
| 350 | AARCH64_TLBI_RVALE3OS = 0x342d, |
| 351 | AARCH64_TLBI_RVALE3OSNXS = 0x34ad, |
| 352 | AARCH64_TLBI_VAAE1 = 0x43b, |
| 353 | AARCH64_TLBI_VAAE1IS = 0x41b, |
| 354 | AARCH64_TLBI_VAAE1ISNXS = 0x49b, |
| 355 | AARCH64_TLBI_VAAE1NXS = 0x4bb, |
| 356 | AARCH64_TLBI_VAAE1OS = 0x40b, |
| 357 | AARCH64_TLBI_VAAE1OSNXS = 0x48b, |
| 358 | AARCH64_TLBI_VAALE1 = 0x43f, |
| 359 | AARCH64_TLBI_VAALE1IS = 0x41f, |
| 360 | AARCH64_TLBI_VAALE1ISNXS = 0x49f, |
| 361 | AARCH64_TLBI_VAALE1NXS = 0x4bf, |
| 362 | AARCH64_TLBI_VAALE1OS = 0x40f, |
| 363 | AARCH64_TLBI_VAALE1OSNXS = 0x48f, |
| 364 | AARCH64_TLBI_VAE1 = 0x439, |
| 365 | AARCH64_TLBI_VAE1IS = 0x419, |
| 366 | AARCH64_TLBI_VAE1ISNXS = 0x499, |
| 367 | AARCH64_TLBI_VAE1NXS = 0x4b9, |
| 368 | AARCH64_TLBI_VAE1OS = 0x409, |
| 369 | AARCH64_TLBI_VAE1OSNXS = 0x489, |
| 370 | AARCH64_TLBI_VAE2 = 0x2439, |
| 371 | AARCH64_TLBI_VAE2IS = 0x2419, |
| 372 | AARCH64_TLBI_VAE2ISNXS = 0x2499, |
| 373 | AARCH64_TLBI_VAE2NXS = 0x24b9, |
| 374 | AARCH64_TLBI_VAE2OS = 0x2409, |
| 375 | AARCH64_TLBI_VAE2OSNXS = 0x2489, |
| 376 | AARCH64_TLBI_VAE3 = 0x3439, |
| 377 | AARCH64_TLBI_VAE3IS = 0x3419, |
| 378 | AARCH64_TLBI_VAE3ISNXS = 0x3499, |
| 379 | AARCH64_TLBI_VAE3NXS = 0x34b9, |
| 380 | AARCH64_TLBI_VAE3OS = 0x3409, |
| 381 | AARCH64_TLBI_VAE3OSNXS = 0x3489, |
| 382 | AARCH64_TLBI_VALE1 = 0x43d, |
| 383 | AARCH64_TLBI_VALE1IS = 0x41d, |
| 384 | AARCH64_TLBI_VALE1ISNXS = 0x49d, |
| 385 | AARCH64_TLBI_VALE1NXS = 0x4bd, |
| 386 | AARCH64_TLBI_VALE1OS = 0x40d, |
| 387 | AARCH64_TLBI_VALE1OSNXS = 0x48d, |
| 388 | AARCH64_TLBI_VALE2 = 0x243d, |
| 389 | AARCH64_TLBI_VALE2IS = 0x241d, |
| 390 | AARCH64_TLBI_VALE2ISNXS = 0x249d, |
| 391 | AARCH64_TLBI_VALE2NXS = 0x24bd, |
| 392 | AARCH64_TLBI_VALE2OS = 0x240d, |
| 393 | AARCH64_TLBI_VALE2OSNXS = 0x248d, |
| 394 | AARCH64_TLBI_VALE3 = 0x343d, |
| 395 | AARCH64_TLBI_VALE3IS = 0x341d, |
| 396 | AARCH64_TLBI_VALE3ISNXS = 0x349d, |
| 397 | AARCH64_TLBI_VALE3NXS = 0x34bd, |
| 398 | AARCH64_TLBI_VALE3OS = 0x340d, |
| 399 | AARCH64_TLBI_VALE3OSNXS = 0x348d, |
| 400 | AARCH64_TLBI_VMALLE1 = 0x438, |
| 401 | AARCH64_TLBI_VMALLE1IS = 0x418, |
| 402 | AARCH64_TLBI_VMALLE1ISNXS = 0x498, |
| 403 | AARCH64_TLBI_VMALLE1NXS = 0x4b8, |
| 404 | AARCH64_TLBI_VMALLE1OS = 0x408, |
| 405 | AARCH64_TLBI_VMALLE1OSNXS = 0x488, |
| 406 | AARCH64_TLBI_VMALLS12E1 = 0x243e, |
| 407 | AARCH64_TLBI_VMALLS12E1IS = 0x241e, |
| 408 | AARCH64_TLBI_VMALLS12E1ISNXS = 0x249e, |
| 409 | AARCH64_TLBI_VMALLS12E1NXS = 0x24be, |
| 410 | AARCH64_TLBI_VMALLS12E1OS = 0x240e, |
| 411 | AARCH64_TLBI_VMALLS12E1OSNXS = 0x248e, |
| 412 | AARCH64_TLBI_VMALLWS2E1 = 0x2432, |
| 413 | AARCH64_TLBI_VMALLWS2E1IS = 0x2412, |
| 414 | AARCH64_TLBI_VMALLWS2E1ISNXS = 0x2492, |
| 415 | AARCH64_TLBI_VMALLWS2E1NXS = 0x24b2, |
| 416 | AARCH64_TLBI_VMALLWS2E1OS = 0x242a, |
| 417 | AARCH64_TLBI_VMALLWS2E1OSNXS = 0x24aa, |
| 418 | |
| 419 | // clang-format on |
| 420 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_TLBI> end |
| 421 | AARCH64_TLBI_ENDING, |
| 422 | } aarch64_tlbi; |
| 423 | |
| 424 | typedef enum { |
| 425 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_AT> begin |
| 426 | // clang-format off |
| 427 | |
| 428 | AARCH64_AT_S12E0R = 0x23c6, |
| 429 | AARCH64_AT_S12E0W = 0x23c7, |
| 430 | AARCH64_AT_S12E1R = 0x23c4, |
| 431 | AARCH64_AT_S12E1W = 0x23c5, |
| 432 | AARCH64_AT_S1E0R = 0x3c2, |
| 433 | AARCH64_AT_S1E0W = 0x3c3, |
| 434 | AARCH64_AT_S1E1A = 0x3ca, |
| 435 | AARCH64_AT_S1E1R = 0x3c0, |
| 436 | AARCH64_AT_S1E1RP = 0x3c8, |
| 437 | AARCH64_AT_S1E1W = 0x3c1, |
| 438 | AARCH64_AT_S1E1WP = 0x3c9, |
| 439 | AARCH64_AT_S1E2A = 0x23ca, |
| 440 | AARCH64_AT_S1E2R = 0x23c0, |
| 441 | AARCH64_AT_S1E2W = 0x23c1, |
| 442 | AARCH64_AT_S1E3A = 0x33ca, |
| 443 | AARCH64_AT_S1E3R = 0x33c0, |
| 444 | AARCH64_AT_S1E3W = 0x33c1, |
| 445 | |
| 446 | // clang-format on |
| 447 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_AT> end |
| 448 | AARCH64_AT_ENDING, |
| 449 | } aarch64_at; |
| 450 | |
| 451 | typedef enum { |
| 452 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_BTI> begin |
| 453 | // clang-format off |
| 454 | |
| 455 | AARCH64_BTI_C = 0x2, |
| 456 | AARCH64_BTI_J = 0x4, |
| 457 | AARCH64_BTI_JC = 0x6, |
| 458 | |
| 459 | // clang-format on |
| 460 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_BTI> end |
| 461 | AARCH64_BTI_ENDING, |
| 462 | } aarch64_bti; |
| 463 | |
| 464 | typedef enum { |
| 465 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_DB> begin |
| 466 | // clang-format off |
| 467 | |
| 468 | AARCH64_DB_ISH = 0xb, |
| 469 | AARCH64_DB_ISHLD = 0x9, |
| 470 | AARCH64_DB_ISHST = 0xa, |
| 471 | AARCH64_DB_LD = 0xd, |
| 472 | AARCH64_DB_NSH = 0x7, |
| 473 | AARCH64_DB_NSHLD = 0x5, |
| 474 | AARCH64_DB_NSHST = 0x6, |
| 475 | AARCH64_DB_OSH = 0x3, |
| 476 | AARCH64_DB_OSHLD = 0x1, |
| 477 | AARCH64_DB_OSHST = 0x2, |
| 478 | AARCH64_DB_ST = 0xe, |
| 479 | AARCH64_DB_SY = 0xf, |
| 480 | |
| 481 | // clang-format on |
| 482 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_DB> end |
| 483 | AARCH64_DB_ENDING, |
| 484 | } aarch64_db; |
| 485 | |
| 486 | typedef enum { |
| 487 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_DBnXS> begin |
| 488 | // clang-format off |
| 489 | |
| 490 | AARCH64_DBNXS_ISHNXS = 0xb, |
| 491 | AARCH64_DBNXS_NSHNXS = 0x7, |
| 492 | AARCH64_DBNXS_OSHNXS = 0x3, |
| 493 | AARCH64_DBNXS_SYNXS = 0xf, |
| 494 | |
| 495 | // clang-format on |
| 496 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_DBnXS> end |
| 497 | AARCH64_DBNXS_ENDING, |
| 498 | } aarch64_dbnxs; |
| 499 | |
| 500 | typedef enum { |
| 501 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_DC> begin |
| 502 | // clang-format off |
| 503 | |
| 504 | AARCH64_DC_CGDSW = 0x3d6, |
| 505 | AARCH64_DC_CGDVAC = 0x1bd5, |
| 506 | AARCH64_DC_CGDVADP = 0x1bed, |
| 507 | AARCH64_DC_CGDVAP = 0x1be5, |
| 508 | AARCH64_DC_CGSW = 0x3d4, |
| 509 | AARCH64_DC_CGVAC = 0x1bd3, |
| 510 | AARCH64_DC_CGVADP = 0x1beb, |
| 511 | AARCH64_DC_CGVAP = 0x1be3, |
| 512 | AARCH64_DC_CIGDPAE = 0x23f7, |
| 513 | AARCH64_DC_CIGDSW = 0x3f6, |
| 514 | AARCH64_DC_CIGDVAC = 0x1bf5, |
| 515 | AARCH64_DC_CIGSW = 0x3f4, |
| 516 | AARCH64_DC_CIGVAC = 0x1bf3, |
| 517 | AARCH64_DC_CIPAE = 0x23f0, |
| 518 | AARCH64_DC_CISW = 0x3f2, |
| 519 | AARCH64_DC_CIVAC = 0x1bf1, |
| 520 | AARCH64_DC_CSW = 0x3d2, |
| 521 | AARCH64_DC_CVAC = 0x1bd1, |
| 522 | AARCH64_DC_CVADP = 0x1be9, |
| 523 | AARCH64_DC_CVAP = 0x1be1, |
| 524 | AARCH64_DC_CVAU = 0x1bd9, |
| 525 | AARCH64_DC_GVA = 0x1ba3, |
| 526 | AARCH64_DC_GZVA = 0x1ba4, |
| 527 | AARCH64_DC_IGDSW = 0x3b6, |
| 528 | AARCH64_DC_IGDVAC = 0x3b5, |
| 529 | AARCH64_DC_IGSW = 0x3b4, |
| 530 | AARCH64_DC_IGVAC = 0x3b3, |
| 531 | AARCH64_DC_ISW = 0x3b2, |
| 532 | AARCH64_DC_IVAC = 0x3b1, |
| 533 | AARCH64_DC_ZVA = 0x1ba1, |
| 534 | |
| 535 | // clang-format on |
| 536 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_DC> end |
| 537 | AARCH64_DC_ENDING, |
| 538 | } aarch64_dc; |
| 539 | |
| 540 | typedef enum { |
| 541 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_ExactFPImm> begin |
| 542 | // clang-format off |
| 543 | |
| 544 | AARCH64_EXACTFPIMM_HALF = 0x1, |
| 545 | AARCH64_EXACTFPIMM_ONE = 0x2, |
| 546 | AARCH64_EXACTFPIMM_TWO = 0x3, |
| 547 | AARCH64_EXACTFPIMM_ZERO = 0x0, |
| 548 | |
| 549 | // clang-format on |
| 550 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_ExactFPImm> end |
| 551 | AARCH64_EXACTFPIMM_INVALID = 0x4, |
| 552 | |
| 553 | AARCH64_EXACTFPIMM_ENDING, |
| 554 | } aarch64_exactfpimm; |
| 555 | |
| 556 | typedef enum { |
| 557 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_IC> begin |
| 558 | // clang-format off |
| 559 | |
| 560 | AARCH64_IC_IALLU = 0x3a8, |
| 561 | AARCH64_IC_IALLUIS = 0x388, |
| 562 | AARCH64_IC_IVAU = 0x1ba9, |
| 563 | |
| 564 | // clang-format on |
| 565 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_IC> end |
| 566 | AARCH64_IC_ENDING, |
| 567 | } aarch64_ic; |
| 568 | |
| 569 | typedef enum { |
| 570 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_ISB> begin |
| 571 | // clang-format off |
| 572 | |
| 573 | AARCH64_ISB_SY = 0xf, |
| 574 | |
| 575 | // clang-format on |
| 576 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_ISB> end |
| 577 | AARCH64_ISB_ENDING, |
| 578 | } aarch64_isb; |
| 579 | |
| 580 | typedef enum { |
| 581 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PRFM> begin |
| 582 | // clang-format off |
| 583 | |
| 584 | AARCH64_PRFM_PLDL1KEEP = 0x0, |
| 585 | AARCH64_PRFM_PLDL1STRM = 0x1, |
| 586 | AARCH64_PRFM_PLDL2KEEP = 0x2, |
| 587 | AARCH64_PRFM_PLDL2STRM = 0x3, |
| 588 | AARCH64_PRFM_PLDL3KEEP = 0x4, |
| 589 | AARCH64_PRFM_PLDL3STRM = 0x5, |
| 590 | AARCH64_PRFM_PLDSLCKEEP = 0x6, |
| 591 | AARCH64_PRFM_PLDSLCSTRM = 0x7, |
| 592 | AARCH64_PRFM_PLIL1KEEP = 0x8, |
| 593 | AARCH64_PRFM_PLIL1STRM = 0x9, |
| 594 | AARCH64_PRFM_PLIL2KEEP = 0xa, |
| 595 | AARCH64_PRFM_PLIL2STRM = 0xb, |
| 596 | AARCH64_PRFM_PLIL3KEEP = 0xc, |
| 597 | AARCH64_PRFM_PLIL3STRM = 0xd, |
| 598 | AARCH64_PRFM_PLISLCKEEP = 0xe, |
| 599 | AARCH64_PRFM_PLISLCSTRM = 0xf, |
| 600 | AARCH64_PRFM_PSTL1KEEP = 0x10, |
| 601 | AARCH64_PRFM_PSTL1STRM = 0x11, |
| 602 | AARCH64_PRFM_PSTL2KEEP = 0x12, |
| 603 | AARCH64_PRFM_PSTL2STRM = 0x13, |
| 604 | AARCH64_PRFM_PSTL3KEEP = 0x14, |
| 605 | AARCH64_PRFM_PSTL3STRM = 0x15, |
| 606 | AARCH64_PRFM_PSTSLCKEEP = 0x16, |
| 607 | AARCH64_PRFM_PSTSLCSTRM = 0x17, |
| 608 | |
| 609 | // clang-format on |
| 610 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PRFM> end |
| 611 | AARCH64_PRFM_ENDING, |
| 612 | } aarch64_prfm; |
| 613 | |
| 614 | typedef enum { |
| 615 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PSB> begin |
| 616 | // clang-format off |
| 617 | |
| 618 | AARCH64_PSB_CSYNC = 0x11, |
| 619 | |
| 620 | // clang-format on |
| 621 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PSB> end |
| 622 | AARCH64_PSB_ENDING, |
| 623 | } aarch64_psb; |
| 624 | |
| 625 | typedef enum { |
| 626 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PStateImm0_1> begin |
| 627 | // clang-format off |
| 628 | |
| 629 | AARCH64_PSTATEIMM0_1_ALLINT = 0x8, |
| 630 | AARCH64_PSTATEIMM0_1_PM = 0x48, |
| 631 | |
| 632 | // clang-format on |
| 633 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PStateImm0_1> end |
| 634 | AARCH64_PSTATEIMM0_1_ENDING, |
| 635 | } aarch64_pstateimm0_1; |
| 636 | |
| 637 | typedef enum { |
| 638 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PStateImm0_15> begin |
| 639 | // clang-format off |
| 640 | |
| 641 | AARCH64_PSTATEIMM0_15_DAIFCLR = 0x1f, |
| 642 | AARCH64_PSTATEIMM0_15_DAIFSET = 0x1e, |
| 643 | AARCH64_PSTATEIMM0_15_DIT = 0x1a, |
| 644 | AARCH64_PSTATEIMM0_15_PAN = 0x4, |
| 645 | AARCH64_PSTATEIMM0_15_SPSEL = 0x5, |
| 646 | AARCH64_PSTATEIMM0_15_SSBS = 0x19, |
| 647 | AARCH64_PSTATEIMM0_15_TCO = 0x1c, |
| 648 | AARCH64_PSTATEIMM0_15_UAO = 0x3, |
| 649 | |
| 650 | // clang-format on |
| 651 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_PStateImm0_15> end |
| 652 | AARCH64_PSTATEIMM0_15_ENDING, |
| 653 | } aarch64_pstateimm0_15; |
| 654 | |
| 655 | typedef enum { |
| 656 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_RPRFM> begin |
| 657 | // clang-format off |
| 658 | |
| 659 | AARCH64_RPRFM_PLDKEEP = 0x0, |
| 660 | AARCH64_RPRFM_PLDSTRM = 0x4, |
| 661 | AARCH64_RPRFM_PSTKEEP = 0x1, |
| 662 | AARCH64_RPRFM_PSTSTRM = 0x5, |
| 663 | |
| 664 | // clang-format on |
| 665 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_RPRFM> end |
| 666 | AARCH64_RPRFM_ENDING, |
| 667 | } aarch64_rprfm; |
| 668 | |
| 669 | typedef enum { |
| 670 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVCR> begin |
| 671 | // clang-format off |
| 672 | |
| 673 | AARCH64_SVCR_SVCRSM = 0x1, |
| 674 | AARCH64_SVCR_SVCRSMZA = 0x3, |
| 675 | AARCH64_SVCR_SVCRZA = 0x2, |
| 676 | |
| 677 | // clang-format on |
| 678 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVCR> end |
| 679 | AARCH64_SVCR_ENDING, |
| 680 | } aarch64_svcr; |
| 681 | |
| 682 | typedef enum { |
| 683 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVEPREDPAT> begin |
| 684 | // clang-format off |
| 685 | |
| 686 | AARCH64_SVEPREDPAT_ALL = 0x1f, |
| 687 | AARCH64_SVEPREDPAT_MUL3 = 0x1e, |
| 688 | AARCH64_SVEPREDPAT_MUL4 = 0x1d, |
| 689 | AARCH64_SVEPREDPAT_POW2 = 0x0, |
| 690 | AARCH64_SVEPREDPAT_VL1 = 0x1, |
| 691 | AARCH64_SVEPREDPAT_VL128 = 0xc, |
| 692 | AARCH64_SVEPREDPAT_VL16 = 0x9, |
| 693 | AARCH64_SVEPREDPAT_VL2 = 0x2, |
| 694 | AARCH64_SVEPREDPAT_VL256 = 0xd, |
| 695 | AARCH64_SVEPREDPAT_VL3 = 0x3, |
| 696 | AARCH64_SVEPREDPAT_VL32 = 0xa, |
| 697 | AARCH64_SVEPREDPAT_VL4 = 0x4, |
| 698 | AARCH64_SVEPREDPAT_VL5 = 0x5, |
| 699 | AARCH64_SVEPREDPAT_VL6 = 0x6, |
| 700 | AARCH64_SVEPREDPAT_VL64 = 0xb, |
| 701 | AARCH64_SVEPREDPAT_VL7 = 0x7, |
| 702 | AARCH64_SVEPREDPAT_VL8 = 0x8, |
| 703 | |
| 704 | // clang-format on |
| 705 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVEPREDPAT> end |
| 706 | AARCH64_SVEPREDPAT_ENDING, |
| 707 | } aarch64_svepredpat; |
| 708 | |
| 709 | typedef enum { |
| 710 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVEPRFM> begin |
| 711 | // clang-format off |
| 712 | |
| 713 | AARCH64_SVEPRFM_PLDL1KEEP = 0x0, |
| 714 | AARCH64_SVEPRFM_PLDL1STRM = 0x1, |
| 715 | AARCH64_SVEPRFM_PLDL2KEEP = 0x2, |
| 716 | AARCH64_SVEPRFM_PLDL2STRM = 0x3, |
| 717 | AARCH64_SVEPRFM_PLDL3KEEP = 0x4, |
| 718 | AARCH64_SVEPRFM_PLDL3STRM = 0x5, |
| 719 | AARCH64_SVEPRFM_PSTL1KEEP = 0x8, |
| 720 | AARCH64_SVEPRFM_PSTL1STRM = 0x9, |
| 721 | AARCH64_SVEPRFM_PSTL2KEEP = 0xa, |
| 722 | AARCH64_SVEPRFM_PSTL2STRM = 0xb, |
| 723 | AARCH64_SVEPRFM_PSTL3KEEP = 0xc, |
| 724 | AARCH64_SVEPRFM_PSTL3STRM = 0xd, |
| 725 | |
| 726 | // clang-format on |
| 727 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVEPRFM> end |
| 728 | AARCH64_SVEPRFM_ENDING, |
| 729 | } aarch64_sveprfm; |
| 730 | |
| 731 | typedef enum { |
| 732 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVEVECLENSPECIFIER> begin |
| 733 | // clang-format off |
| 734 | |
| 735 | AARCH64_SVEVECLENSPECIFIER_VLX2 = 0x0, |
| 736 | AARCH64_SVEVECLENSPECIFIER_VLX4 = 0x1, |
| 737 | |
| 738 | // clang-format on |
| 739 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SVEVECLENSPECIFIER> end |
| 740 | AARCH64_SVEVECLENSPECIFIER_ENDING, |
| 741 | } aarch64_sveveclenspecifier; |
| 742 | |
| 743 | typedef enum { |
| 744 | AARCH64_SYSREG_INVALID = 0, |
| 745 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SysReg> begin |
| 746 | // clang-format off |
| 747 | |
| 748 | AARCH64_SYSREG_ACCDATA_EL1 = 0xc685, |
| 749 | AARCH64_SYSREG_ACTLR_EL1 = 0xc081, |
| 750 | AARCH64_SYSREG_ACTLR_EL2 = 0xe081, |
| 751 | AARCH64_SYSREG_ACTLR_EL3 = 0xf081, |
| 752 | AARCH64_SYSREG_AFSR0_EL1 = 0xc288, |
| 753 | AARCH64_SYSREG_AFSR0_EL12 = 0xea88, |
| 754 | AARCH64_SYSREG_AFSR0_EL2 = 0xe288, |
| 755 | AARCH64_SYSREG_AFSR0_EL3 = 0xf288, |
| 756 | AARCH64_SYSREG_AFSR1_EL1 = 0xc289, |
| 757 | AARCH64_SYSREG_AFSR1_EL12 = 0xea89, |
| 758 | AARCH64_SYSREG_AFSR1_EL2 = 0xe289, |
| 759 | AARCH64_SYSREG_AFSR1_EL3 = 0xf289, |
| 760 | AARCH64_SYSREG_AIDR_EL1 = 0xc807, |
| 761 | AARCH64_SYSREG_ALLINT = 0xc218, |
| 762 | AARCH64_SYSREG_AMAIR2_EL1 = 0xc519, |
| 763 | AARCH64_SYSREG_AMAIR2_EL12 = 0xed19, |
| 764 | AARCH64_SYSREG_AMAIR2_EL2 = 0xe519, |
| 765 | AARCH64_SYSREG_AMAIR2_EL3 = 0xf519, |
| 766 | AARCH64_SYSREG_AMAIR_EL1 = 0xc518, |
| 767 | AARCH64_SYSREG_AMAIR_EL12 = 0xed18, |
| 768 | AARCH64_SYSREG_AMAIR_EL2 = 0xe518, |
| 769 | AARCH64_SYSREG_AMAIR_EL3 = 0xf518, |
| 770 | AARCH64_SYSREG_AMCFGR_EL0 = 0xde91, |
| 771 | AARCH64_SYSREG_AMCG1IDR_EL0 = 0xde96, |
| 772 | AARCH64_SYSREG_AMCGCR_EL0 = 0xde92, |
| 773 | AARCH64_SYSREG_AMCNTENCLR0_EL0 = 0xde94, |
| 774 | AARCH64_SYSREG_AMCNTENCLR1_EL0 = 0xde98, |
| 775 | AARCH64_SYSREG_AMCNTENSET0_EL0 = 0xde95, |
| 776 | AARCH64_SYSREG_AMCNTENSET1_EL0 = 0xde99, |
| 777 | AARCH64_SYSREG_AMCR_EL0 = 0xde90, |
| 778 | AARCH64_SYSREG_AMEVCNTR00_EL0 = 0xdea0, |
| 779 | AARCH64_SYSREG_AMEVCNTR01_EL0 = 0xdea1, |
| 780 | AARCH64_SYSREG_AMEVCNTR02_EL0 = 0xdea2, |
| 781 | AARCH64_SYSREG_AMEVCNTR03_EL0 = 0xdea3, |
| 782 | AARCH64_SYSREG_AMEVCNTR10_EL0 = 0xdee0, |
| 783 | AARCH64_SYSREG_AMEVCNTR110_EL0 = 0xdeea, |
| 784 | AARCH64_SYSREG_AMEVCNTR111_EL0 = 0xdeeb, |
| 785 | AARCH64_SYSREG_AMEVCNTR112_EL0 = 0xdeec, |
| 786 | AARCH64_SYSREG_AMEVCNTR113_EL0 = 0xdeed, |
| 787 | AARCH64_SYSREG_AMEVCNTR114_EL0 = 0xdeee, |
| 788 | AARCH64_SYSREG_AMEVCNTR115_EL0 = 0xdeef, |
| 789 | AARCH64_SYSREG_AMEVCNTR11_EL0 = 0xdee1, |
| 790 | AARCH64_SYSREG_AMEVCNTR12_EL0 = 0xdee2, |
| 791 | AARCH64_SYSREG_AMEVCNTR13_EL0 = 0xdee3, |
| 792 | AARCH64_SYSREG_AMEVCNTR14_EL0 = 0xdee4, |
| 793 | AARCH64_SYSREG_AMEVCNTR15_EL0 = 0xdee5, |
| 794 | AARCH64_SYSREG_AMEVCNTR16_EL0 = 0xdee6, |
| 795 | AARCH64_SYSREG_AMEVCNTR17_EL0 = 0xdee7, |
| 796 | AARCH64_SYSREG_AMEVCNTR18_EL0 = 0xdee8, |
| 797 | AARCH64_SYSREG_AMEVCNTR19_EL0 = 0xdee9, |
| 798 | AARCH64_SYSREG_AMEVCNTVOFF00_EL2 = 0xe6c0, |
| 799 | AARCH64_SYSREG_AMEVCNTVOFF010_EL2 = 0xe6ca, |
| 800 | AARCH64_SYSREG_AMEVCNTVOFF011_EL2 = 0xe6cb, |
| 801 | AARCH64_SYSREG_AMEVCNTVOFF012_EL2 = 0xe6cc, |
| 802 | AARCH64_SYSREG_AMEVCNTVOFF013_EL2 = 0xe6cd, |
| 803 | AARCH64_SYSREG_AMEVCNTVOFF014_EL2 = 0xe6ce, |
| 804 | AARCH64_SYSREG_AMEVCNTVOFF015_EL2 = 0xe6cf, |
| 805 | AARCH64_SYSREG_AMEVCNTVOFF01_EL2 = 0xe6c1, |
| 806 | AARCH64_SYSREG_AMEVCNTVOFF02_EL2 = 0xe6c2, |
| 807 | AARCH64_SYSREG_AMEVCNTVOFF03_EL2 = 0xe6c3, |
| 808 | AARCH64_SYSREG_AMEVCNTVOFF04_EL2 = 0xe6c4, |
| 809 | AARCH64_SYSREG_AMEVCNTVOFF05_EL2 = 0xe6c5, |
| 810 | AARCH64_SYSREG_AMEVCNTVOFF06_EL2 = 0xe6c6, |
| 811 | AARCH64_SYSREG_AMEVCNTVOFF07_EL2 = 0xe6c7, |
| 812 | AARCH64_SYSREG_AMEVCNTVOFF08_EL2 = 0xe6c8, |
| 813 | AARCH64_SYSREG_AMEVCNTVOFF09_EL2 = 0xe6c9, |
| 814 | AARCH64_SYSREG_AMEVCNTVOFF10_EL2 = 0xe6d0, |
| 815 | AARCH64_SYSREG_AMEVCNTVOFF110_EL2 = 0xe6da, |
| 816 | AARCH64_SYSREG_AMEVCNTVOFF111_EL2 = 0xe6db, |
| 817 | AARCH64_SYSREG_AMEVCNTVOFF112_EL2 = 0xe6dc, |
| 818 | AARCH64_SYSREG_AMEVCNTVOFF113_EL2 = 0xe6dd, |
| 819 | AARCH64_SYSREG_AMEVCNTVOFF114_EL2 = 0xe6de, |
| 820 | AARCH64_SYSREG_AMEVCNTVOFF115_EL2 = 0xe6df, |
| 821 | AARCH64_SYSREG_AMEVCNTVOFF11_EL2 = 0xe6d1, |
| 822 | AARCH64_SYSREG_AMEVCNTVOFF12_EL2 = 0xe6d2, |
| 823 | AARCH64_SYSREG_AMEVCNTVOFF13_EL2 = 0xe6d3, |
| 824 | AARCH64_SYSREG_AMEVCNTVOFF14_EL2 = 0xe6d4, |
| 825 | AARCH64_SYSREG_AMEVCNTVOFF15_EL2 = 0xe6d5, |
| 826 | AARCH64_SYSREG_AMEVCNTVOFF16_EL2 = 0xe6d6, |
| 827 | AARCH64_SYSREG_AMEVCNTVOFF17_EL2 = 0xe6d7, |
| 828 | AARCH64_SYSREG_AMEVCNTVOFF18_EL2 = 0xe6d8, |
| 829 | AARCH64_SYSREG_AMEVCNTVOFF19_EL2 = 0xe6d9, |
| 830 | AARCH64_SYSREG_AMEVTYPER00_EL0 = 0xdeb0, |
| 831 | AARCH64_SYSREG_AMEVTYPER01_EL0 = 0xdeb1, |
| 832 | AARCH64_SYSREG_AMEVTYPER02_EL0 = 0xdeb2, |
| 833 | AARCH64_SYSREG_AMEVTYPER03_EL0 = 0xdeb3, |
| 834 | AARCH64_SYSREG_AMEVTYPER10_EL0 = 0xdef0, |
| 835 | AARCH64_SYSREG_AMEVTYPER110_EL0 = 0xdefa, |
| 836 | AARCH64_SYSREG_AMEVTYPER111_EL0 = 0xdefb, |
| 837 | AARCH64_SYSREG_AMEVTYPER112_EL0 = 0xdefc, |
| 838 | AARCH64_SYSREG_AMEVTYPER113_EL0 = 0xdefd, |
| 839 | AARCH64_SYSREG_AMEVTYPER114_EL0 = 0xdefe, |
| 840 | AARCH64_SYSREG_AMEVTYPER115_EL0 = 0xdeff, |
| 841 | AARCH64_SYSREG_AMEVTYPER11_EL0 = 0xdef1, |
| 842 | AARCH64_SYSREG_AMEVTYPER12_EL0 = 0xdef2, |
| 843 | AARCH64_SYSREG_AMEVTYPER13_EL0 = 0xdef3, |
| 844 | AARCH64_SYSREG_AMEVTYPER14_EL0 = 0xdef4, |
| 845 | AARCH64_SYSREG_AMEVTYPER15_EL0 = 0xdef5, |
| 846 | AARCH64_SYSREG_AMEVTYPER16_EL0 = 0xdef6, |
| 847 | AARCH64_SYSREG_AMEVTYPER17_EL0 = 0xdef7, |
| 848 | AARCH64_SYSREG_AMEVTYPER18_EL0 = 0xdef8, |
| 849 | AARCH64_SYSREG_AMEVTYPER19_EL0 = 0xdef9, |
| 850 | AARCH64_SYSREG_AMUSERENR_EL0 = 0xde93, |
| 851 | AARCH64_SYSREG_APDAKEYHI_EL1 = 0xc111, |
| 852 | AARCH64_SYSREG_APDAKEYLO_EL1 = 0xc110, |
| 853 | AARCH64_SYSREG_APDBKEYHI_EL1 = 0xc113, |
| 854 | AARCH64_SYSREG_APDBKEYLO_EL1 = 0xc112, |
| 855 | AARCH64_SYSREG_APGAKEYHI_EL1 = 0xc119, |
| 856 | AARCH64_SYSREG_APGAKEYLO_EL1 = 0xc118, |
| 857 | AARCH64_SYSREG_APIAKEYHI_EL1 = 0xc109, |
| 858 | AARCH64_SYSREG_APIAKEYLO_EL1 = 0xc108, |
| 859 | AARCH64_SYSREG_APIBKEYHI_EL1 = 0xc10b, |
| 860 | AARCH64_SYSREG_APIBKEYLO_EL1 = 0xc10a, |
| 861 | AARCH64_SYSREG_BRBCR_EL1 = 0x8c80, |
| 862 | AARCH64_SYSREG_BRBCR_EL12 = 0xac80, |
| 863 | AARCH64_SYSREG_BRBCR_EL2 = 0xa480, |
| 864 | AARCH64_SYSREG_BRBFCR_EL1 = 0x8c81, |
| 865 | AARCH64_SYSREG_BRBIDR0_EL1 = 0x8c90, |
| 866 | AARCH64_SYSREG_BRBINF0_EL1 = 0x8c00, |
| 867 | AARCH64_SYSREG_BRBINF10_EL1 = 0x8c50, |
| 868 | AARCH64_SYSREG_BRBINF11_EL1 = 0x8c58, |
| 869 | AARCH64_SYSREG_BRBINF12_EL1 = 0x8c60, |
| 870 | AARCH64_SYSREG_BRBINF13_EL1 = 0x8c68, |
| 871 | AARCH64_SYSREG_BRBINF14_EL1 = 0x8c70, |
| 872 | AARCH64_SYSREG_BRBINF15_EL1 = 0x8c78, |
| 873 | AARCH64_SYSREG_BRBINF16_EL1 = 0x8c04, |
| 874 | AARCH64_SYSREG_BRBINF17_EL1 = 0x8c0c, |
| 875 | AARCH64_SYSREG_BRBINF18_EL1 = 0x8c14, |
| 876 | AARCH64_SYSREG_BRBINF19_EL1 = 0x8c1c, |
| 877 | AARCH64_SYSREG_BRBINF1_EL1 = 0x8c08, |
| 878 | AARCH64_SYSREG_BRBINF20_EL1 = 0x8c24, |
| 879 | AARCH64_SYSREG_BRBINF21_EL1 = 0x8c2c, |
| 880 | AARCH64_SYSREG_BRBINF22_EL1 = 0x8c34, |
| 881 | AARCH64_SYSREG_BRBINF23_EL1 = 0x8c3c, |
| 882 | AARCH64_SYSREG_BRBINF24_EL1 = 0x8c44, |
| 883 | AARCH64_SYSREG_BRBINF25_EL1 = 0x8c4c, |
| 884 | AARCH64_SYSREG_BRBINF26_EL1 = 0x8c54, |
| 885 | AARCH64_SYSREG_BRBINF27_EL1 = 0x8c5c, |
| 886 | AARCH64_SYSREG_BRBINF28_EL1 = 0x8c64, |
| 887 | AARCH64_SYSREG_BRBINF29_EL1 = 0x8c6c, |
| 888 | AARCH64_SYSREG_BRBINF2_EL1 = 0x8c10, |
| 889 | AARCH64_SYSREG_BRBINF30_EL1 = 0x8c74, |
| 890 | AARCH64_SYSREG_BRBINF31_EL1 = 0x8c7c, |
| 891 | AARCH64_SYSREG_BRBINF3_EL1 = 0x8c18, |
| 892 | AARCH64_SYSREG_BRBINF4_EL1 = 0x8c20, |
| 893 | AARCH64_SYSREG_BRBINF5_EL1 = 0x8c28, |
| 894 | AARCH64_SYSREG_BRBINF6_EL1 = 0x8c30, |
| 895 | AARCH64_SYSREG_BRBINF7_EL1 = 0x8c38, |
| 896 | AARCH64_SYSREG_BRBINF8_EL1 = 0x8c40, |
| 897 | AARCH64_SYSREG_BRBINF9_EL1 = 0x8c48, |
| 898 | AARCH64_SYSREG_BRBINFINJ_EL1 = 0x8c88, |
| 899 | AARCH64_SYSREG_BRBSRC0_EL1 = 0x8c01, |
| 900 | AARCH64_SYSREG_BRBSRC10_EL1 = 0x8c51, |
| 901 | AARCH64_SYSREG_BRBSRC11_EL1 = 0x8c59, |
| 902 | AARCH64_SYSREG_BRBSRC12_EL1 = 0x8c61, |
| 903 | AARCH64_SYSREG_BRBSRC13_EL1 = 0x8c69, |
| 904 | AARCH64_SYSREG_BRBSRC14_EL1 = 0x8c71, |
| 905 | AARCH64_SYSREG_BRBSRC15_EL1 = 0x8c79, |
| 906 | AARCH64_SYSREG_BRBSRC16_EL1 = 0x8c05, |
| 907 | AARCH64_SYSREG_BRBSRC17_EL1 = 0x8c0d, |
| 908 | AARCH64_SYSREG_BRBSRC18_EL1 = 0x8c15, |
| 909 | AARCH64_SYSREG_BRBSRC19_EL1 = 0x8c1d, |
| 910 | AARCH64_SYSREG_BRBSRC1_EL1 = 0x8c09, |
| 911 | AARCH64_SYSREG_BRBSRC20_EL1 = 0x8c25, |
| 912 | AARCH64_SYSREG_BRBSRC21_EL1 = 0x8c2d, |
| 913 | AARCH64_SYSREG_BRBSRC22_EL1 = 0x8c35, |
| 914 | AARCH64_SYSREG_BRBSRC23_EL1 = 0x8c3d, |
| 915 | AARCH64_SYSREG_BRBSRC24_EL1 = 0x8c45, |
| 916 | AARCH64_SYSREG_BRBSRC25_EL1 = 0x8c4d, |
| 917 | AARCH64_SYSREG_BRBSRC26_EL1 = 0x8c55, |
| 918 | AARCH64_SYSREG_BRBSRC27_EL1 = 0x8c5d, |
| 919 | AARCH64_SYSREG_BRBSRC28_EL1 = 0x8c65, |
| 920 | AARCH64_SYSREG_BRBSRC29_EL1 = 0x8c6d, |
| 921 | AARCH64_SYSREG_BRBSRC2_EL1 = 0x8c11, |
| 922 | AARCH64_SYSREG_BRBSRC30_EL1 = 0x8c75, |
| 923 | AARCH64_SYSREG_BRBSRC31_EL1 = 0x8c7d, |
| 924 | AARCH64_SYSREG_BRBSRC3_EL1 = 0x8c19, |
| 925 | AARCH64_SYSREG_BRBSRC4_EL1 = 0x8c21, |
| 926 | AARCH64_SYSREG_BRBSRC5_EL1 = 0x8c29, |
| 927 | AARCH64_SYSREG_BRBSRC6_EL1 = 0x8c31, |
| 928 | AARCH64_SYSREG_BRBSRC7_EL1 = 0x8c39, |
| 929 | AARCH64_SYSREG_BRBSRC8_EL1 = 0x8c41, |
| 930 | AARCH64_SYSREG_BRBSRC9_EL1 = 0x8c49, |
| 931 | AARCH64_SYSREG_BRBSRCINJ_EL1 = 0x8c89, |
| 932 | AARCH64_SYSREG_BRBTGT0_EL1 = 0x8c02, |
| 933 | AARCH64_SYSREG_BRBTGT10_EL1 = 0x8c52, |
| 934 | AARCH64_SYSREG_BRBTGT11_EL1 = 0x8c5a, |
| 935 | AARCH64_SYSREG_BRBTGT12_EL1 = 0x8c62, |
| 936 | AARCH64_SYSREG_BRBTGT13_EL1 = 0x8c6a, |
| 937 | AARCH64_SYSREG_BRBTGT14_EL1 = 0x8c72, |
| 938 | AARCH64_SYSREG_BRBTGT15_EL1 = 0x8c7a, |
| 939 | AARCH64_SYSREG_BRBTGT16_EL1 = 0x8c06, |
| 940 | AARCH64_SYSREG_BRBTGT17_EL1 = 0x8c0e, |
| 941 | AARCH64_SYSREG_BRBTGT18_EL1 = 0x8c16, |
| 942 | AARCH64_SYSREG_BRBTGT19_EL1 = 0x8c1e, |
| 943 | AARCH64_SYSREG_BRBTGT1_EL1 = 0x8c0a, |
| 944 | AARCH64_SYSREG_BRBTGT20_EL1 = 0x8c26, |
| 945 | AARCH64_SYSREG_BRBTGT21_EL1 = 0x8c2e, |
| 946 | AARCH64_SYSREG_BRBTGT22_EL1 = 0x8c36, |
| 947 | AARCH64_SYSREG_BRBTGT23_EL1 = 0x8c3e, |
| 948 | AARCH64_SYSREG_BRBTGT24_EL1 = 0x8c46, |
| 949 | AARCH64_SYSREG_BRBTGT25_EL1 = 0x8c4e, |
| 950 | AARCH64_SYSREG_BRBTGT26_EL1 = 0x8c56, |
| 951 | AARCH64_SYSREG_BRBTGT27_EL1 = 0x8c5e, |
| 952 | AARCH64_SYSREG_BRBTGT28_EL1 = 0x8c66, |
| 953 | AARCH64_SYSREG_BRBTGT29_EL1 = 0x8c6e, |
| 954 | AARCH64_SYSREG_BRBTGT2_EL1 = 0x8c12, |
| 955 | AARCH64_SYSREG_BRBTGT30_EL1 = 0x8c76, |
| 956 | AARCH64_SYSREG_BRBTGT31_EL1 = 0x8c7e, |
| 957 | AARCH64_SYSREG_BRBTGT3_EL1 = 0x8c1a, |
| 958 | AARCH64_SYSREG_BRBTGT4_EL1 = 0x8c22, |
| 959 | AARCH64_SYSREG_BRBTGT5_EL1 = 0x8c2a, |
| 960 | AARCH64_SYSREG_BRBTGT6_EL1 = 0x8c32, |
| 961 | AARCH64_SYSREG_BRBTGT7_EL1 = 0x8c3a, |
| 962 | AARCH64_SYSREG_BRBTGT8_EL1 = 0x8c42, |
| 963 | AARCH64_SYSREG_BRBTGT9_EL1 = 0x8c4a, |
| 964 | AARCH64_SYSREG_BRBTGTINJ_EL1 = 0x8c8a, |
| 965 | AARCH64_SYSREG_BRBTS_EL1 = 0x8c82, |
| 966 | AARCH64_SYSREG_CCSIDR2_EL1 = 0xc802, |
| 967 | AARCH64_SYSREG_CCSIDR_EL1 = 0xc800, |
| 968 | AARCH64_SYSREG_CLIDR_EL1 = 0xc801, |
| 969 | AARCH64_SYSREG_CNTFRQ_EL0 = 0xdf00, |
| 970 | AARCH64_SYSREG_CNTHCTL_EL2 = 0xe708, |
| 971 | AARCH64_SYSREG_CNTHPS_CTL_EL2 = 0xe729, |
| 972 | AARCH64_SYSREG_CNTHPS_CVAL_EL2 = 0xe72a, |
| 973 | AARCH64_SYSREG_CNTHPS_TVAL_EL2 = 0xe728, |
| 974 | AARCH64_SYSREG_CNTHP_CTL_EL2 = 0xe711, |
| 975 | AARCH64_SYSREG_CNTHP_CVAL_EL2 = 0xe712, |
| 976 | AARCH64_SYSREG_CNTHP_TVAL_EL2 = 0xe710, |
| 977 | AARCH64_SYSREG_CNTHVS_CTL_EL2 = 0xe721, |
| 978 | AARCH64_SYSREG_CNTHVS_CVAL_EL2 = 0xe722, |
| 979 | AARCH64_SYSREG_CNTHVS_TVAL_EL2 = 0xe720, |
| 980 | AARCH64_SYSREG_CNTHV_CTL_EL2 = 0xe719, |
| 981 | AARCH64_SYSREG_CNTHV_CVAL_EL2 = 0xe71a, |
| 982 | AARCH64_SYSREG_CNTHV_TVAL_EL2 = 0xe718, |
| 983 | AARCH64_SYSREG_CNTISCALE_EL2 = 0xe705, |
| 984 | AARCH64_SYSREG_CNTKCTL_EL1 = 0xc708, |
| 985 | AARCH64_SYSREG_CNTKCTL_EL12 = 0xef08, |
| 986 | AARCH64_SYSREG_CNTPCTSS_EL0 = 0xdf05, |
| 987 | AARCH64_SYSREG_CNTPCT_EL0 = 0xdf01, |
| 988 | AARCH64_SYSREG_CNTPOFF_EL2 = 0xe706, |
| 989 | AARCH64_SYSREG_CNTPS_CTL_EL1 = 0xff11, |
| 990 | AARCH64_SYSREG_CNTPS_CVAL_EL1 = 0xff12, |
| 991 | AARCH64_SYSREG_CNTPS_TVAL_EL1 = 0xff10, |
| 992 | AARCH64_SYSREG_CNTP_CTL_EL0 = 0xdf11, |
| 993 | AARCH64_SYSREG_CNTP_CTL_EL02 = 0xef11, |
| 994 | AARCH64_SYSREG_CNTP_CVAL_EL0 = 0xdf12, |
| 995 | AARCH64_SYSREG_CNTP_CVAL_EL02 = 0xef12, |
| 996 | AARCH64_SYSREG_CNTP_TVAL_EL0 = 0xdf10, |
| 997 | AARCH64_SYSREG_CNTP_TVAL_EL02 = 0xef10, |
| 998 | AARCH64_SYSREG_CNTSCALE_EL2 = 0xe704, |
| 999 | AARCH64_SYSREG_CNTVCTSS_EL0 = 0xdf06, |
| 1000 | AARCH64_SYSREG_CNTVCT_EL0 = 0xdf02, |
| 1001 | AARCH64_SYSREG_CNTVFRQ_EL2 = 0xe707, |
| 1002 | AARCH64_SYSREG_CNTVOFF_EL2 = 0xe703, |
| 1003 | AARCH64_SYSREG_CNTV_CTL_EL0 = 0xdf19, |
| 1004 | AARCH64_SYSREG_CNTV_CTL_EL02 = 0xef19, |
| 1005 | AARCH64_SYSREG_CNTV_CVAL_EL0 = 0xdf1a, |
| 1006 | AARCH64_SYSREG_CNTV_CVAL_EL02 = 0xef1a, |
| 1007 | AARCH64_SYSREG_CNTV_TVAL_EL0 = 0xdf18, |
| 1008 | AARCH64_SYSREG_CNTV_TVAL_EL02 = 0xef18, |
| 1009 | AARCH64_SYSREG_CONTEXTIDR_EL1 = 0xc681, |
| 1010 | AARCH64_SYSREG_CONTEXTIDR_EL12 = 0xee81, |
| 1011 | AARCH64_SYSREG_CONTEXTIDR_EL2 = 0xe681, |
| 1012 | AARCH64_SYSREG_CPACR_EL1 = 0xc082, |
| 1013 | AARCH64_SYSREG_CPACR_EL12 = 0xe882, |
| 1014 | AARCH64_SYSREG_CPM_IOACC_CTL_EL3 = 0xff90, |
| 1015 | AARCH64_SYSREG_CPTR_EL2 = 0xe08a, |
| 1016 | AARCH64_SYSREG_CPTR_EL3 = 0xf08a, |
| 1017 | AARCH64_SYSREG_CSSELR_EL1 = 0xd000, |
| 1018 | AARCH64_SYSREG_CTR_EL0 = 0xd801, |
| 1019 | AARCH64_SYSREG_CURRENTEL = 0xc212, |
| 1020 | AARCH64_SYSREG_DACR32_EL2 = 0xe180, |
| 1021 | AARCH64_SYSREG_DAIF = 0xda11, |
| 1022 | AARCH64_SYSREG_DBGAUTHSTATUS_EL1 = 0x83f6, |
| 1023 | AARCH64_SYSREG_DBGBCR0_EL1 = 0x8005, |
| 1024 | AARCH64_SYSREG_DBGBCR10_EL1 = 0x8055, |
| 1025 | AARCH64_SYSREG_DBGBCR11_EL1 = 0x805d, |
| 1026 | AARCH64_SYSREG_DBGBCR12_EL1 = 0x8065, |
| 1027 | AARCH64_SYSREG_DBGBCR13_EL1 = 0x806d, |
| 1028 | AARCH64_SYSREG_DBGBCR14_EL1 = 0x8075, |
| 1029 | AARCH64_SYSREG_DBGBCR15_EL1 = 0x807d, |
| 1030 | AARCH64_SYSREG_DBGBCR1_EL1 = 0x800d, |
| 1031 | AARCH64_SYSREG_DBGBCR2_EL1 = 0x8015, |
| 1032 | AARCH64_SYSREG_DBGBCR3_EL1 = 0x801d, |
| 1033 | AARCH64_SYSREG_DBGBCR4_EL1 = 0x8025, |
| 1034 | AARCH64_SYSREG_DBGBCR5_EL1 = 0x802d, |
| 1035 | AARCH64_SYSREG_DBGBCR6_EL1 = 0x8035, |
| 1036 | AARCH64_SYSREG_DBGBCR7_EL1 = 0x803d, |
| 1037 | AARCH64_SYSREG_DBGBCR8_EL1 = 0x8045, |
| 1038 | AARCH64_SYSREG_DBGBCR9_EL1 = 0x804d, |
| 1039 | AARCH64_SYSREG_DBGBVR0_EL1 = 0x8004, |
| 1040 | AARCH64_SYSREG_DBGBVR10_EL1 = 0x8054, |
| 1041 | AARCH64_SYSREG_DBGBVR11_EL1 = 0x805c, |
| 1042 | AARCH64_SYSREG_DBGBVR12_EL1 = 0x8064, |
| 1043 | AARCH64_SYSREG_DBGBVR13_EL1 = 0x806c, |
| 1044 | AARCH64_SYSREG_DBGBVR14_EL1 = 0x8074, |
| 1045 | AARCH64_SYSREG_DBGBVR15_EL1 = 0x807c, |
| 1046 | AARCH64_SYSREG_DBGBVR1_EL1 = 0x800c, |
| 1047 | AARCH64_SYSREG_DBGBVR2_EL1 = 0x8014, |
| 1048 | AARCH64_SYSREG_DBGBVR3_EL1 = 0x801c, |
| 1049 | AARCH64_SYSREG_DBGBVR4_EL1 = 0x8024, |
| 1050 | AARCH64_SYSREG_DBGBVR5_EL1 = 0x802c, |
| 1051 | AARCH64_SYSREG_DBGBVR6_EL1 = 0x8034, |
| 1052 | AARCH64_SYSREG_DBGBVR7_EL1 = 0x803c, |
| 1053 | AARCH64_SYSREG_DBGBVR8_EL1 = 0x8044, |
| 1054 | AARCH64_SYSREG_DBGBVR9_EL1 = 0x804c, |
| 1055 | AARCH64_SYSREG_DBGCLAIMCLR_EL1 = 0x83ce, |
| 1056 | AARCH64_SYSREG_DBGCLAIMSET_EL1 = 0x83c6, |
| 1057 | AARCH64_SYSREG_DBGDTRRX_EL0 = 0x9828, |
| 1058 | AARCH64_SYSREG_DBGDTRTX_EL0 = 0x9828, |
| 1059 | AARCH64_SYSREG_DBGDTR_EL0 = 0x9820, |
| 1060 | AARCH64_SYSREG_DBGPRCR_EL1 = 0x80a4, |
| 1061 | AARCH64_SYSREG_DBGVCR32_EL2 = 0xa038, |
| 1062 | AARCH64_SYSREG_DBGWCR0_EL1 = 0x8007, |
| 1063 | AARCH64_SYSREG_DBGWCR10_EL1 = 0x8057, |
| 1064 | AARCH64_SYSREG_DBGWCR11_EL1 = 0x805f, |
| 1065 | AARCH64_SYSREG_DBGWCR12_EL1 = 0x8067, |
| 1066 | AARCH64_SYSREG_DBGWCR13_EL1 = 0x806f, |
| 1067 | AARCH64_SYSREG_DBGWCR14_EL1 = 0x8077, |
| 1068 | AARCH64_SYSREG_DBGWCR15_EL1 = 0x807f, |
| 1069 | AARCH64_SYSREG_DBGWCR1_EL1 = 0x800f, |
| 1070 | AARCH64_SYSREG_DBGWCR2_EL1 = 0x8017, |
| 1071 | AARCH64_SYSREG_DBGWCR3_EL1 = 0x801f, |
| 1072 | AARCH64_SYSREG_DBGWCR4_EL1 = 0x8027, |
| 1073 | AARCH64_SYSREG_DBGWCR5_EL1 = 0x802f, |
| 1074 | AARCH64_SYSREG_DBGWCR6_EL1 = 0x8037, |
| 1075 | AARCH64_SYSREG_DBGWCR7_EL1 = 0x803f, |
| 1076 | AARCH64_SYSREG_DBGWCR8_EL1 = 0x8047, |
| 1077 | AARCH64_SYSREG_DBGWCR9_EL1 = 0x804f, |
| 1078 | AARCH64_SYSREG_DBGWVR0_EL1 = 0x8006, |
| 1079 | AARCH64_SYSREG_DBGWVR10_EL1 = 0x8056, |
| 1080 | AARCH64_SYSREG_DBGWVR11_EL1 = 0x805e, |
| 1081 | AARCH64_SYSREG_DBGWVR12_EL1 = 0x8066, |
| 1082 | AARCH64_SYSREG_DBGWVR13_EL1 = 0x806e, |
| 1083 | AARCH64_SYSREG_DBGWVR14_EL1 = 0x8076, |
| 1084 | AARCH64_SYSREG_DBGWVR15_EL1 = 0x807e, |
| 1085 | AARCH64_SYSREG_DBGWVR1_EL1 = 0x800e, |
| 1086 | AARCH64_SYSREG_DBGWVR2_EL1 = 0x8016, |
| 1087 | AARCH64_SYSREG_DBGWVR3_EL1 = 0x801e, |
| 1088 | AARCH64_SYSREG_DBGWVR4_EL1 = 0x8026, |
| 1089 | AARCH64_SYSREG_DBGWVR5_EL1 = 0x802e, |
| 1090 | AARCH64_SYSREG_DBGWVR6_EL1 = 0x8036, |
| 1091 | AARCH64_SYSREG_DBGWVR7_EL1 = 0x803e, |
| 1092 | AARCH64_SYSREG_DBGWVR8_EL1 = 0x8046, |
| 1093 | AARCH64_SYSREG_DBGWVR9_EL1 = 0x804e, |
| 1094 | AARCH64_SYSREG_DCZID_EL0 = 0xd807, |
| 1095 | AARCH64_SYSREG_DISR_EL1 = 0xc609, |
| 1096 | AARCH64_SYSREG_DIT = 0xda15, |
| 1097 | AARCH64_SYSREG_DLR_EL0 = 0xda29, |
| 1098 | AARCH64_SYSREG_DSPSR_EL0 = 0xda28, |
| 1099 | AARCH64_SYSREG_ELR_EL1 = 0xc201, |
| 1100 | AARCH64_SYSREG_ELR_EL12 = 0xea01, |
| 1101 | AARCH64_SYSREG_ELR_EL2 = 0xe201, |
| 1102 | AARCH64_SYSREG_ELR_EL3 = 0xf201, |
| 1103 | AARCH64_SYSREG_ERRIDR_EL1 = 0xc298, |
| 1104 | AARCH64_SYSREG_ERRSELR_EL1 = 0xc299, |
| 1105 | AARCH64_SYSREG_ERXADDR_EL1 = 0xc2a3, |
| 1106 | AARCH64_SYSREG_ERXCTLR_EL1 = 0xc2a1, |
| 1107 | AARCH64_SYSREG_ERXFR_EL1 = 0xc2a0, |
| 1108 | AARCH64_SYSREG_ERXGSR_EL1 = 0xc29a, |
| 1109 | AARCH64_SYSREG_ERXMISC0_EL1 = 0xc2a8, |
| 1110 | AARCH64_SYSREG_ERXMISC1_EL1 = 0xc2a9, |
| 1111 | AARCH64_SYSREG_ERXMISC2_EL1 = 0xc2aa, |
| 1112 | AARCH64_SYSREG_ERXMISC3_EL1 = 0xc2ab, |
| 1113 | AARCH64_SYSREG_ERXPFGCDN_EL1 = 0xc2a6, |
| 1114 | AARCH64_SYSREG_ERXPFGCTL_EL1 = 0xc2a5, |
| 1115 | AARCH64_SYSREG_ERXPFGF_EL1 = 0xc2a4, |
| 1116 | AARCH64_SYSREG_ERXSTATUS_EL1 = 0xc2a2, |
| 1117 | AARCH64_SYSREG_ESR_EL1 = 0xc290, |
| 1118 | AARCH64_SYSREG_ESR_EL12 = 0xea90, |
| 1119 | AARCH64_SYSREG_ESR_EL2 = 0xe290, |
| 1120 | AARCH64_SYSREG_ESR_EL3 = 0xf290, |
| 1121 | AARCH64_SYSREG_FAR_EL1 = 0xc300, |
| 1122 | AARCH64_SYSREG_FAR_EL12 = 0xeb00, |
| 1123 | AARCH64_SYSREG_FAR_EL2 = 0xe300, |
| 1124 | AARCH64_SYSREG_FAR_EL3 = 0xf300, |
| 1125 | AARCH64_SYSREG_FGWTE3_EL3 = 0xf08d, |
| 1126 | AARCH64_SYSREG_FPCR = 0xda20, |
| 1127 | AARCH64_SYSREG_FPEXC32_EL2 = 0xe298, |
| 1128 | AARCH64_SYSREG_FPMR = 0xda22, |
| 1129 | AARCH64_SYSREG_FPSR = 0xda21, |
| 1130 | AARCH64_SYSREG_GCR_EL1 = 0xc086, |
| 1131 | AARCH64_SYSREG_GCSCRE0_EL1 = 0xc12a, |
| 1132 | AARCH64_SYSREG_GCSCR_EL1 = 0xc128, |
| 1133 | AARCH64_SYSREG_GCSCR_EL12 = 0xe928, |
| 1134 | AARCH64_SYSREG_GCSCR_EL2 = 0xe128, |
| 1135 | AARCH64_SYSREG_GCSCR_EL3 = 0xf128, |
| 1136 | AARCH64_SYSREG_GCSPR_EL0 = 0xd929, |
| 1137 | AARCH64_SYSREG_GCSPR_EL1 = 0xc129, |
| 1138 | AARCH64_SYSREG_GCSPR_EL12 = 0xe929, |
| 1139 | AARCH64_SYSREG_GCSPR_EL2 = 0xe129, |
| 1140 | AARCH64_SYSREG_GCSPR_EL3 = 0xf129, |
| 1141 | AARCH64_SYSREG_GMID_EL1 = 0xc804, |
| 1142 | AARCH64_SYSREG_GPCCR_EL3 = 0xf10e, |
| 1143 | AARCH64_SYSREG_GPTBR_EL3 = 0xf10c, |
| 1144 | AARCH64_SYSREG_HACDBSBR_EL2 = 0xe11c, |
| 1145 | AARCH64_SYSREG_HACDBSCONS_EL2 = 0xe11d, |
| 1146 | AARCH64_SYSREG_HACR_EL2 = 0xe08f, |
| 1147 | AARCH64_SYSREG_HAFGRTR_EL2 = 0xe18e, |
| 1148 | AARCH64_SYSREG_HCRX_EL2 = 0xe092, |
| 1149 | AARCH64_SYSREG_HCR_EL2 = 0xe088, |
| 1150 | AARCH64_SYSREG_HDBSSBR_EL2 = 0xe11a, |
| 1151 | AARCH64_SYSREG_HDBSSPROD_EL2 = 0xe11b, |
| 1152 | AARCH64_SYSREG_HDFGRTR2_EL2 = 0xe188, |
| 1153 | AARCH64_SYSREG_HDFGRTR_EL2 = 0xe18c, |
| 1154 | AARCH64_SYSREG_HDFGWTR2_EL2 = 0xe189, |
| 1155 | AARCH64_SYSREG_HDFGWTR_EL2 = 0xe18d, |
| 1156 | AARCH64_SYSREG_HFGITR2_EL2 = 0xe18f, |
| 1157 | AARCH64_SYSREG_HFGITR_EL2 = 0xe08e, |
| 1158 | AARCH64_SYSREG_HFGRTR2_EL2 = 0xe18a, |
| 1159 | AARCH64_SYSREG_HFGRTR_EL2 = 0xe08c, |
| 1160 | AARCH64_SYSREG_HFGWTR2_EL2 = 0xe18b, |
| 1161 | AARCH64_SYSREG_HFGWTR_EL2 = 0xe08d, |
| 1162 | AARCH64_SYSREG_HPFAR_EL2 = 0xe304, |
| 1163 | AARCH64_SYSREG_HSTR_EL2 = 0xe08b, |
| 1164 | AARCH64_SYSREG_ICC_AP0R0_EL1 = 0xc644, |
| 1165 | AARCH64_SYSREG_ICC_AP0R1_EL1 = 0xc645, |
| 1166 | AARCH64_SYSREG_ICC_AP0R2_EL1 = 0xc646, |
| 1167 | AARCH64_SYSREG_ICC_AP0R3_EL1 = 0xc647, |
| 1168 | AARCH64_SYSREG_ICC_AP1R0_EL1 = 0xc648, |
| 1169 | AARCH64_SYSREG_ICC_AP1R1_EL1 = 0xc649, |
| 1170 | AARCH64_SYSREG_ICC_AP1R2_EL1 = 0xc64a, |
| 1171 | AARCH64_SYSREG_ICC_AP1R3_EL1 = 0xc64b, |
| 1172 | AARCH64_SYSREG_ICC_ASGI1R_EL1 = 0xc65e, |
| 1173 | AARCH64_SYSREG_ICC_BPR0_EL1 = 0xc643, |
| 1174 | AARCH64_SYSREG_ICC_BPR1_EL1 = 0xc663, |
| 1175 | AARCH64_SYSREG_ICC_CTLR_EL1 = 0xc664, |
| 1176 | AARCH64_SYSREG_ICC_CTLR_EL3 = 0xf664, |
| 1177 | AARCH64_SYSREG_ICC_DIR_EL1 = 0xc659, |
| 1178 | AARCH64_SYSREG_ICC_EOIR0_EL1 = 0xc641, |
| 1179 | AARCH64_SYSREG_ICC_EOIR1_EL1 = 0xc661, |
| 1180 | AARCH64_SYSREG_ICC_HPPIR0_EL1 = 0xc642, |
| 1181 | AARCH64_SYSREG_ICC_HPPIR1_EL1 = 0xc662, |
| 1182 | AARCH64_SYSREG_ICC_IAR0_EL1 = 0xc640, |
| 1183 | AARCH64_SYSREG_ICC_IAR1_EL1 = 0xc660, |
| 1184 | AARCH64_SYSREG_ICC_IGRPEN0_EL1 = 0xc666, |
| 1185 | AARCH64_SYSREG_ICC_IGRPEN1_EL1 = 0xc667, |
| 1186 | AARCH64_SYSREG_ICC_IGRPEN1_EL3 = 0xf667, |
| 1187 | AARCH64_SYSREG_ICC_NMIAR1_EL1 = 0xc64d, |
| 1188 | AARCH64_SYSREG_ICC_PMR_EL1 = 0xc230, |
| 1189 | AARCH64_SYSREG_ICC_RPR_EL1 = 0xc65b, |
| 1190 | AARCH64_SYSREG_ICC_SGI0R_EL1 = 0xc65f, |
| 1191 | AARCH64_SYSREG_ICC_SGI1R_EL1 = 0xc65d, |
| 1192 | AARCH64_SYSREG_ICC_SRE_EL1 = 0xc665, |
| 1193 | AARCH64_SYSREG_ICC_SRE_EL2 = 0xe64d, |
| 1194 | AARCH64_SYSREG_ICC_SRE_EL3 = 0xf665, |
| 1195 | AARCH64_SYSREG_ICH_AP0R0_EL2 = 0xe640, |
| 1196 | AARCH64_SYSREG_ICH_AP0R1_EL2 = 0xe641, |
| 1197 | AARCH64_SYSREG_ICH_AP0R2_EL2 = 0xe642, |
| 1198 | AARCH64_SYSREG_ICH_AP0R3_EL2 = 0xe643, |
| 1199 | AARCH64_SYSREG_ICH_AP1R0_EL2 = 0xe648, |
| 1200 | AARCH64_SYSREG_ICH_AP1R1_EL2 = 0xe649, |
| 1201 | AARCH64_SYSREG_ICH_AP1R2_EL2 = 0xe64a, |
| 1202 | AARCH64_SYSREG_ICH_AP1R3_EL2 = 0xe64b, |
| 1203 | AARCH64_SYSREG_ICH_EISR_EL2 = 0xe65b, |
| 1204 | AARCH64_SYSREG_ICH_ELRSR_EL2 = 0xe65d, |
| 1205 | AARCH64_SYSREG_ICH_HCR_EL2 = 0xe658, |
| 1206 | AARCH64_SYSREG_ICH_LR0_EL2 = 0xe660, |
| 1207 | AARCH64_SYSREG_ICH_LR10_EL2 = 0xe66a, |
| 1208 | AARCH64_SYSREG_ICH_LR11_EL2 = 0xe66b, |
| 1209 | AARCH64_SYSREG_ICH_LR12_EL2 = 0xe66c, |
| 1210 | AARCH64_SYSREG_ICH_LR13_EL2 = 0xe66d, |
| 1211 | AARCH64_SYSREG_ICH_LR14_EL2 = 0xe66e, |
| 1212 | AARCH64_SYSREG_ICH_LR15_EL2 = 0xe66f, |
| 1213 | AARCH64_SYSREG_ICH_LR1_EL2 = 0xe661, |
| 1214 | AARCH64_SYSREG_ICH_LR2_EL2 = 0xe662, |
| 1215 | AARCH64_SYSREG_ICH_LR3_EL2 = 0xe663, |
| 1216 | AARCH64_SYSREG_ICH_LR4_EL2 = 0xe664, |
| 1217 | AARCH64_SYSREG_ICH_LR5_EL2 = 0xe665, |
| 1218 | AARCH64_SYSREG_ICH_LR6_EL2 = 0xe666, |
| 1219 | AARCH64_SYSREG_ICH_LR7_EL2 = 0xe667, |
| 1220 | AARCH64_SYSREG_ICH_LR8_EL2 = 0xe668, |
| 1221 | AARCH64_SYSREG_ICH_LR9_EL2 = 0xe669, |
| 1222 | AARCH64_SYSREG_ICH_MISR_EL2 = 0xe65a, |
| 1223 | AARCH64_SYSREG_ICH_VMCR_EL2 = 0xe65f, |
| 1224 | AARCH64_SYSREG_ICH_VTR_EL2 = 0xe659, |
| 1225 | AARCH64_SYSREG_ID_AA64AFR0_EL1 = 0xc02c, |
| 1226 | AARCH64_SYSREG_ID_AA64AFR1_EL1 = 0xc02d, |
| 1227 | AARCH64_SYSREG_ID_AA64DFR0_EL1 = 0xc028, |
| 1228 | AARCH64_SYSREG_ID_AA64DFR1_EL1 = 0xc029, |
| 1229 | AARCH64_SYSREG_ID_AA64DFR2_EL1 = 0xc02a, |
| 1230 | AARCH64_SYSREG_ID_AA64FPFR0_EL1 = 0xc027, |
| 1231 | AARCH64_SYSREG_ID_AA64ISAR0_EL1 = 0xc030, |
| 1232 | AARCH64_SYSREG_ID_AA64ISAR1_EL1 = 0xc031, |
| 1233 | AARCH64_SYSREG_ID_AA64ISAR2_EL1 = 0xc032, |
| 1234 | AARCH64_SYSREG_ID_AA64ISAR3_EL1 = 0xc033, |
| 1235 | AARCH64_SYSREG_ID_AA64MMFR0_EL1 = 0xc038, |
| 1236 | AARCH64_SYSREG_ID_AA64MMFR1_EL1 = 0xc039, |
| 1237 | AARCH64_SYSREG_ID_AA64MMFR2_EL1 = 0xc03a, |
| 1238 | AARCH64_SYSREG_ID_AA64MMFR3_EL1 = 0xc03b, |
| 1239 | AARCH64_SYSREG_ID_AA64MMFR4_EL1 = 0xc03c, |
| 1240 | AARCH64_SYSREG_ID_AA64PFR0_EL1 = 0xc020, |
| 1241 | AARCH64_SYSREG_ID_AA64PFR1_EL1 = 0xc021, |
| 1242 | AARCH64_SYSREG_ID_AA64PFR2_EL1 = 0xc022, |
| 1243 | AARCH64_SYSREG_ID_AA64SMFR0_EL1 = 0xc025, |
| 1244 | AARCH64_SYSREG_ID_AA64ZFR0_EL1 = 0xc024, |
| 1245 | AARCH64_SYSREG_ID_AFR0_EL1 = 0xc00b, |
| 1246 | AARCH64_SYSREG_ID_DFR0_EL1 = 0xc00a, |
| 1247 | AARCH64_SYSREG_ID_DFR1_EL1 = 0xc01d, |
| 1248 | AARCH64_SYSREG_ID_ISAR0_EL1 = 0xc010, |
| 1249 | AARCH64_SYSREG_ID_ISAR1_EL1 = 0xc011, |
| 1250 | AARCH64_SYSREG_ID_ISAR2_EL1 = 0xc012, |
| 1251 | AARCH64_SYSREG_ID_ISAR3_EL1 = 0xc013, |
| 1252 | AARCH64_SYSREG_ID_ISAR4_EL1 = 0xc014, |
| 1253 | AARCH64_SYSREG_ID_ISAR5_EL1 = 0xc015, |
| 1254 | AARCH64_SYSREG_ID_ISAR6_EL1 = 0xc017, |
| 1255 | AARCH64_SYSREG_ID_MMFR0_EL1 = 0xc00c, |
| 1256 | AARCH64_SYSREG_ID_MMFR1_EL1 = 0xc00d, |
| 1257 | AARCH64_SYSREG_ID_MMFR2_EL1 = 0xc00e, |
| 1258 | AARCH64_SYSREG_ID_MMFR3_EL1 = 0xc00f, |
| 1259 | AARCH64_SYSREG_ID_MMFR4_EL1 = 0xc016, |
| 1260 | AARCH64_SYSREG_ID_MMFR5_EL1 = 0xc01e, |
| 1261 | AARCH64_SYSREG_ID_PFR0_EL1 = 0xc008, |
| 1262 | AARCH64_SYSREG_ID_PFR1_EL1 = 0xc009, |
| 1263 | AARCH64_SYSREG_ID_PFR2_EL1 = 0xc01c, |
| 1264 | AARCH64_SYSREG_IFSR32_EL2 = 0xe281, |
| 1265 | AARCH64_SYSREG_ISR_EL1 = 0xc608, |
| 1266 | AARCH64_SYSREG_LORC_EL1 = 0xc523, |
| 1267 | AARCH64_SYSREG_LOREA_EL1 = 0xc521, |
| 1268 | AARCH64_SYSREG_LORID_EL1 = 0xc527, |
| 1269 | AARCH64_SYSREG_LORN_EL1 = 0xc522, |
| 1270 | AARCH64_SYSREG_LORSA_EL1 = 0xc520, |
| 1271 | AARCH64_SYSREG_MAIR2_EL1 = 0xc511, |
| 1272 | AARCH64_SYSREG_MAIR2_EL12 = 0xed11, |
| 1273 | AARCH64_SYSREG_MAIR2_EL2 = 0xe509, |
| 1274 | AARCH64_SYSREG_MAIR2_EL3 = 0xf509, |
| 1275 | AARCH64_SYSREG_MAIR_EL1 = 0xc510, |
| 1276 | AARCH64_SYSREG_MAIR_EL12 = 0xed10, |
| 1277 | AARCH64_SYSREG_MAIR_EL2 = 0xe510, |
| 1278 | AARCH64_SYSREG_MAIR_EL3 = 0xf510, |
| 1279 | AARCH64_SYSREG_MDCCINT_EL1 = 0x8010, |
| 1280 | AARCH64_SYSREG_MDCCSR_EL0 = 0x9808, |
| 1281 | AARCH64_SYSREG_MDCR_EL2 = 0xe089, |
| 1282 | AARCH64_SYSREG_MDCR_EL3 = 0xf099, |
| 1283 | AARCH64_SYSREG_MDRAR_EL1 = 0x8080, |
| 1284 | AARCH64_SYSREG_MDSCR_EL1 = 0x8012, |
| 1285 | AARCH64_SYSREG_MDSELR_EL1 = 0x8022, |
| 1286 | AARCH64_SYSREG_MDSTEPOP_EL1 = 0x802a, |
| 1287 | AARCH64_SYSREG_MECIDR_EL2 = 0xe547, |
| 1288 | AARCH64_SYSREG_MECID_A0_EL2 = 0xe541, |
| 1289 | AARCH64_SYSREG_MECID_A1_EL2 = 0xe543, |
| 1290 | AARCH64_SYSREG_MECID_P0_EL2 = 0xe540, |
| 1291 | AARCH64_SYSREG_MECID_P1_EL2 = 0xe542, |
| 1292 | AARCH64_SYSREG_MECID_RL_A_EL3 = 0xf551, |
| 1293 | AARCH64_SYSREG_MFAR_EL3 = 0xf305, |
| 1294 | AARCH64_SYSREG_MIDR_EL1 = 0xc000, |
| 1295 | AARCH64_SYSREG_MPAM0_EL1 = 0xc529, |
| 1296 | AARCH64_SYSREG_MPAM1_EL1 = 0xc528, |
| 1297 | AARCH64_SYSREG_MPAM1_EL12 = 0xed28, |
| 1298 | AARCH64_SYSREG_MPAM2_EL2 = 0xe528, |
| 1299 | AARCH64_SYSREG_MPAM3_EL3 = 0xf528, |
| 1300 | AARCH64_SYSREG_MPAMHCR_EL2 = 0xe520, |
| 1301 | AARCH64_SYSREG_MPAMIDR_EL1 = 0xc524, |
| 1302 | AARCH64_SYSREG_MPAMSM_EL1 = 0xc52b, |
| 1303 | AARCH64_SYSREG_MPAMVPM0_EL2 = 0xe530, |
| 1304 | AARCH64_SYSREG_MPAMVPM1_EL2 = 0xe531, |
| 1305 | AARCH64_SYSREG_MPAMVPM2_EL2 = 0xe532, |
| 1306 | AARCH64_SYSREG_MPAMVPM3_EL2 = 0xe533, |
| 1307 | AARCH64_SYSREG_MPAMVPM4_EL2 = 0xe534, |
| 1308 | AARCH64_SYSREG_MPAMVPM5_EL2 = 0xe535, |
| 1309 | AARCH64_SYSREG_MPAMVPM6_EL2 = 0xe536, |
| 1310 | AARCH64_SYSREG_MPAMVPM7_EL2 = 0xe537, |
| 1311 | AARCH64_SYSREG_MPAMVPMV_EL2 = 0xe521, |
| 1312 | AARCH64_SYSREG_MPIDR_EL1 = 0xc005, |
| 1313 | AARCH64_SYSREG_MPUIR_EL1 = 0xc004, |
| 1314 | AARCH64_SYSREG_MPUIR_EL2 = 0xe004, |
| 1315 | AARCH64_SYSREG_MVFR0_EL1 = 0xc018, |
| 1316 | AARCH64_SYSREG_MVFR1_EL1 = 0xc019, |
| 1317 | AARCH64_SYSREG_MVFR2_EL1 = 0xc01a, |
| 1318 | AARCH64_SYSREG_NZCV = 0xda10, |
| 1319 | AARCH64_SYSREG_OSDLR_EL1 = 0x809c, |
| 1320 | AARCH64_SYSREG_OSDTRRX_EL1 = 0x8002, |
| 1321 | AARCH64_SYSREG_OSDTRTX_EL1 = 0x801a, |
| 1322 | AARCH64_SYSREG_OSECCR_EL1 = 0x8032, |
| 1323 | AARCH64_SYSREG_OSLAR_EL1 = 0x8084, |
| 1324 | AARCH64_SYSREG_OSLSR_EL1 = 0x808c, |
| 1325 | AARCH64_SYSREG_PAN = 0xc213, |
| 1326 | AARCH64_SYSREG_PAR_EL1 = 0xc3a0, |
| 1327 | AARCH64_SYSREG_PFAR_EL1 = 0xc305, |
| 1328 | AARCH64_SYSREG_PFAR_EL12 = 0xeb05, |
| 1329 | AARCH64_SYSREG_PFAR_EL2 = 0xe305, |
| 1330 | AARCH64_SYSREG_PIRE0_EL1 = 0xc512, |
| 1331 | AARCH64_SYSREG_PIRE0_EL12 = 0xed12, |
| 1332 | AARCH64_SYSREG_PIRE0_EL2 = 0xe512, |
| 1333 | AARCH64_SYSREG_PIR_EL1 = 0xc513, |
| 1334 | AARCH64_SYSREG_PIR_EL12 = 0xed13, |
| 1335 | AARCH64_SYSREG_PIR_EL2 = 0xe513, |
| 1336 | AARCH64_SYSREG_PIR_EL3 = 0xf513, |
| 1337 | AARCH64_SYSREG_PM = 0xc219, |
| 1338 | AARCH64_SYSREG_PMBIDR_EL1 = 0xc4d7, |
| 1339 | AARCH64_SYSREG_PMBLIMITR_EL1 = 0xc4d0, |
| 1340 | AARCH64_SYSREG_PMBPTR_EL1 = 0xc4d1, |
| 1341 | AARCH64_SYSREG_PMBSR_EL1 = 0xc4d3, |
| 1342 | AARCH64_SYSREG_PMCCFILTR_EL0 = 0xdf7f, |
| 1343 | AARCH64_SYSREG_PMCCNTR_EL0 = 0xdce8, |
| 1344 | AARCH64_SYSREG_PMCCNTSVR_EL1 = 0x875f, |
| 1345 | AARCH64_SYSREG_PMCEID0_EL0 = 0xdce6, |
| 1346 | AARCH64_SYSREG_PMCEID1_EL0 = 0xdce7, |
| 1347 | AARCH64_SYSREG_PMCNTENCLR_EL0 = 0xdce2, |
| 1348 | AARCH64_SYSREG_PMCNTENSET_EL0 = 0xdce1, |
| 1349 | AARCH64_SYSREG_PMCR_EL0 = 0xdce0, |
| 1350 | AARCH64_SYSREG_PMECR_EL1 = 0xc4f5, |
| 1351 | AARCH64_SYSREG_PMEVCNTR0_EL0 = 0xdf40, |
| 1352 | AARCH64_SYSREG_PMEVCNTR10_EL0 = 0xdf4a, |
| 1353 | AARCH64_SYSREG_PMEVCNTR11_EL0 = 0xdf4b, |
| 1354 | AARCH64_SYSREG_PMEVCNTR12_EL0 = 0xdf4c, |
| 1355 | AARCH64_SYSREG_PMEVCNTR13_EL0 = 0xdf4d, |
| 1356 | AARCH64_SYSREG_PMEVCNTR14_EL0 = 0xdf4e, |
| 1357 | AARCH64_SYSREG_PMEVCNTR15_EL0 = 0xdf4f, |
| 1358 | AARCH64_SYSREG_PMEVCNTR16_EL0 = 0xdf50, |
| 1359 | AARCH64_SYSREG_PMEVCNTR17_EL0 = 0xdf51, |
| 1360 | AARCH64_SYSREG_PMEVCNTR18_EL0 = 0xdf52, |
| 1361 | AARCH64_SYSREG_PMEVCNTR19_EL0 = 0xdf53, |
| 1362 | AARCH64_SYSREG_PMEVCNTR1_EL0 = 0xdf41, |
| 1363 | AARCH64_SYSREG_PMEVCNTR20_EL0 = 0xdf54, |
| 1364 | AARCH64_SYSREG_PMEVCNTR21_EL0 = 0xdf55, |
| 1365 | AARCH64_SYSREG_PMEVCNTR22_EL0 = 0xdf56, |
| 1366 | AARCH64_SYSREG_PMEVCNTR23_EL0 = 0xdf57, |
| 1367 | AARCH64_SYSREG_PMEVCNTR24_EL0 = 0xdf58, |
| 1368 | AARCH64_SYSREG_PMEVCNTR25_EL0 = 0xdf59, |
| 1369 | AARCH64_SYSREG_PMEVCNTR26_EL0 = 0xdf5a, |
| 1370 | AARCH64_SYSREG_PMEVCNTR27_EL0 = 0xdf5b, |
| 1371 | AARCH64_SYSREG_PMEVCNTR28_EL0 = 0xdf5c, |
| 1372 | AARCH64_SYSREG_PMEVCNTR29_EL0 = 0xdf5d, |
| 1373 | AARCH64_SYSREG_PMEVCNTR2_EL0 = 0xdf42, |
| 1374 | AARCH64_SYSREG_PMEVCNTR30_EL0 = 0xdf5e, |
| 1375 | AARCH64_SYSREG_PMEVCNTR3_EL0 = 0xdf43, |
| 1376 | AARCH64_SYSREG_PMEVCNTR4_EL0 = 0xdf44, |
| 1377 | AARCH64_SYSREG_PMEVCNTR5_EL0 = 0xdf45, |
| 1378 | AARCH64_SYSREG_PMEVCNTR6_EL0 = 0xdf46, |
| 1379 | AARCH64_SYSREG_PMEVCNTR7_EL0 = 0xdf47, |
| 1380 | AARCH64_SYSREG_PMEVCNTR8_EL0 = 0xdf48, |
| 1381 | AARCH64_SYSREG_PMEVCNTR9_EL0 = 0xdf49, |
| 1382 | AARCH64_SYSREG_PMEVCNTSVR0_EL1 = 0x8740, |
| 1383 | AARCH64_SYSREG_PMEVCNTSVR10_EL1 = 0x874a, |
| 1384 | AARCH64_SYSREG_PMEVCNTSVR11_EL1 = 0x874b, |
| 1385 | AARCH64_SYSREG_PMEVCNTSVR12_EL1 = 0x874c, |
| 1386 | AARCH64_SYSREG_PMEVCNTSVR13_EL1 = 0x874d, |
| 1387 | AARCH64_SYSREG_PMEVCNTSVR14_EL1 = 0x874e, |
| 1388 | AARCH64_SYSREG_PMEVCNTSVR15_EL1 = 0x874f, |
| 1389 | AARCH64_SYSREG_PMEVCNTSVR16_EL1 = 0x8750, |
| 1390 | AARCH64_SYSREG_PMEVCNTSVR17_EL1 = 0x8751, |
| 1391 | AARCH64_SYSREG_PMEVCNTSVR18_EL1 = 0x8752, |
| 1392 | AARCH64_SYSREG_PMEVCNTSVR19_EL1 = 0x8753, |
| 1393 | AARCH64_SYSREG_PMEVCNTSVR1_EL1 = 0x8741, |
| 1394 | AARCH64_SYSREG_PMEVCNTSVR20_EL1 = 0x8754, |
| 1395 | AARCH64_SYSREG_PMEVCNTSVR21_EL1 = 0x8755, |
| 1396 | AARCH64_SYSREG_PMEVCNTSVR22_EL1 = 0x8756, |
| 1397 | AARCH64_SYSREG_PMEVCNTSVR23_EL1 = 0x8757, |
| 1398 | AARCH64_SYSREG_PMEVCNTSVR24_EL1 = 0x8758, |
| 1399 | AARCH64_SYSREG_PMEVCNTSVR25_EL1 = 0x8759, |
| 1400 | AARCH64_SYSREG_PMEVCNTSVR26_EL1 = 0x875a, |
| 1401 | AARCH64_SYSREG_PMEVCNTSVR27_EL1 = 0x875b, |
| 1402 | AARCH64_SYSREG_PMEVCNTSVR28_EL1 = 0x875c, |
| 1403 | AARCH64_SYSREG_PMEVCNTSVR29_EL1 = 0x875d, |
| 1404 | AARCH64_SYSREG_PMEVCNTSVR2_EL1 = 0x8742, |
| 1405 | AARCH64_SYSREG_PMEVCNTSVR30_EL1 = 0x875e, |
| 1406 | AARCH64_SYSREG_PMEVCNTSVR3_EL1 = 0x8743, |
| 1407 | AARCH64_SYSREG_PMEVCNTSVR4_EL1 = 0x8744, |
| 1408 | AARCH64_SYSREG_PMEVCNTSVR5_EL1 = 0x8745, |
| 1409 | AARCH64_SYSREG_PMEVCNTSVR6_EL1 = 0x8746, |
| 1410 | AARCH64_SYSREG_PMEVCNTSVR7_EL1 = 0x8747, |
| 1411 | AARCH64_SYSREG_PMEVCNTSVR8_EL1 = 0x8748, |
| 1412 | AARCH64_SYSREG_PMEVCNTSVR9_EL1 = 0x8749, |
| 1413 | AARCH64_SYSREG_PMEVTYPER0_EL0 = 0xdf60, |
| 1414 | AARCH64_SYSREG_PMEVTYPER10_EL0 = 0xdf6a, |
| 1415 | AARCH64_SYSREG_PMEVTYPER11_EL0 = 0xdf6b, |
| 1416 | AARCH64_SYSREG_PMEVTYPER12_EL0 = 0xdf6c, |
| 1417 | AARCH64_SYSREG_PMEVTYPER13_EL0 = 0xdf6d, |
| 1418 | AARCH64_SYSREG_PMEVTYPER14_EL0 = 0xdf6e, |
| 1419 | AARCH64_SYSREG_PMEVTYPER15_EL0 = 0xdf6f, |
| 1420 | AARCH64_SYSREG_PMEVTYPER16_EL0 = 0xdf70, |
| 1421 | AARCH64_SYSREG_PMEVTYPER17_EL0 = 0xdf71, |
| 1422 | AARCH64_SYSREG_PMEVTYPER18_EL0 = 0xdf72, |
| 1423 | AARCH64_SYSREG_PMEVTYPER19_EL0 = 0xdf73, |
| 1424 | AARCH64_SYSREG_PMEVTYPER1_EL0 = 0xdf61, |
| 1425 | AARCH64_SYSREG_PMEVTYPER20_EL0 = 0xdf74, |
| 1426 | AARCH64_SYSREG_PMEVTYPER21_EL0 = 0xdf75, |
| 1427 | AARCH64_SYSREG_PMEVTYPER22_EL0 = 0xdf76, |
| 1428 | AARCH64_SYSREG_PMEVTYPER23_EL0 = 0xdf77, |
| 1429 | AARCH64_SYSREG_PMEVTYPER24_EL0 = 0xdf78, |
| 1430 | AARCH64_SYSREG_PMEVTYPER25_EL0 = 0xdf79, |
| 1431 | AARCH64_SYSREG_PMEVTYPER26_EL0 = 0xdf7a, |
| 1432 | AARCH64_SYSREG_PMEVTYPER27_EL0 = 0xdf7b, |
| 1433 | AARCH64_SYSREG_PMEVTYPER28_EL0 = 0xdf7c, |
| 1434 | AARCH64_SYSREG_PMEVTYPER29_EL0 = 0xdf7d, |
| 1435 | AARCH64_SYSREG_PMEVTYPER2_EL0 = 0xdf62, |
| 1436 | AARCH64_SYSREG_PMEVTYPER30_EL0 = 0xdf7e, |
| 1437 | AARCH64_SYSREG_PMEVTYPER3_EL0 = 0xdf63, |
| 1438 | AARCH64_SYSREG_PMEVTYPER4_EL0 = 0xdf64, |
| 1439 | AARCH64_SYSREG_PMEVTYPER5_EL0 = 0xdf65, |
| 1440 | AARCH64_SYSREG_PMEVTYPER6_EL0 = 0xdf66, |
| 1441 | AARCH64_SYSREG_PMEVTYPER7_EL0 = 0xdf67, |
| 1442 | AARCH64_SYSREG_PMEVTYPER8_EL0 = 0xdf68, |
| 1443 | AARCH64_SYSREG_PMEVTYPER9_EL0 = 0xdf69, |
| 1444 | AARCH64_SYSREG_PMIAR_EL1 = 0xc4f7, |
| 1445 | AARCH64_SYSREG_PMICFILTR_EL0 = 0xdcb0, |
| 1446 | AARCH64_SYSREG_PMICNTR_EL0 = 0xdca0, |
| 1447 | AARCH64_SYSREG_PMICNTSVR_EL1 = 0x8760, |
| 1448 | AARCH64_SYSREG_PMINTENCLR_EL1 = 0xc4f2, |
| 1449 | AARCH64_SYSREG_PMINTENSET_EL1 = 0xc4f1, |
| 1450 | AARCH64_SYSREG_PMMIR_EL1 = 0xc4f6, |
| 1451 | AARCH64_SYSREG_PMOVSCLR_EL0 = 0xdce3, |
| 1452 | AARCH64_SYSREG_PMOVSSET_EL0 = 0xdcf3, |
| 1453 | AARCH64_SYSREG_PMSCR_EL1 = 0xc4c8, |
| 1454 | AARCH64_SYSREG_PMSCR_EL12 = 0xecc8, |
| 1455 | AARCH64_SYSREG_PMSCR_EL2 = 0xe4c8, |
| 1456 | AARCH64_SYSREG_PMSDSFR_EL1 = 0xc4d4, |
| 1457 | AARCH64_SYSREG_PMSELR_EL0 = 0xdce5, |
| 1458 | AARCH64_SYSREG_PMSEVFR_EL1 = 0xc4cd, |
| 1459 | AARCH64_SYSREG_PMSFCR_EL1 = 0xc4cc, |
| 1460 | AARCH64_SYSREG_PMSICR_EL1 = 0xc4ca, |
| 1461 | AARCH64_SYSREG_PMSIDR_EL1 = 0xc4cf, |
| 1462 | AARCH64_SYSREG_PMSIRR_EL1 = 0xc4cb, |
| 1463 | AARCH64_SYSREG_PMSLATFR_EL1 = 0xc4ce, |
| 1464 | AARCH64_SYSREG_PMSNEVFR_EL1 = 0xc4c9, |
| 1465 | AARCH64_SYSREG_PMSSCR_EL1 = 0xc4eb, |
| 1466 | AARCH64_SYSREG_PMSWINC_EL0 = 0xdce4, |
| 1467 | AARCH64_SYSREG_PMUACR_EL1 = 0xc4f4, |
| 1468 | AARCH64_SYSREG_PMUSERENR_EL0 = 0xdcf0, |
| 1469 | AARCH64_SYSREG_PMXEVCNTR_EL0 = 0xdcea, |
| 1470 | AARCH64_SYSREG_PMXEVTYPER_EL0 = 0xdce9, |
| 1471 | AARCH64_SYSREG_PMZR_EL0 = 0xdcec, |
| 1472 | AARCH64_SYSREG_POR_EL0 = 0xdd14, |
| 1473 | AARCH64_SYSREG_POR_EL1 = 0xc514, |
| 1474 | AARCH64_SYSREG_POR_EL12 = 0xed14, |
| 1475 | AARCH64_SYSREG_POR_EL2 = 0xe514, |
| 1476 | AARCH64_SYSREG_POR_EL3 = 0xf514, |
| 1477 | AARCH64_SYSREG_PRBAR10_EL1 = 0xc368, |
| 1478 | AARCH64_SYSREG_PRBAR10_EL2 = 0xe368, |
| 1479 | AARCH64_SYSREG_PRBAR11_EL1 = 0xc36c, |
| 1480 | AARCH64_SYSREG_PRBAR11_EL2 = 0xe36c, |
| 1481 | AARCH64_SYSREG_PRBAR12_EL1 = 0xc370, |
| 1482 | AARCH64_SYSREG_PRBAR12_EL2 = 0xe370, |
| 1483 | AARCH64_SYSREG_PRBAR13_EL1 = 0xc374, |
| 1484 | AARCH64_SYSREG_PRBAR13_EL2 = 0xe374, |
| 1485 | AARCH64_SYSREG_PRBAR14_EL1 = 0xc378, |
| 1486 | AARCH64_SYSREG_PRBAR14_EL2 = 0xe378, |
| 1487 | AARCH64_SYSREG_PRBAR15_EL1 = 0xc37c, |
| 1488 | AARCH64_SYSREG_PRBAR15_EL2 = 0xe37c, |
| 1489 | AARCH64_SYSREG_PRBAR1_EL1 = 0xc344, |
| 1490 | AARCH64_SYSREG_PRBAR1_EL2 = 0xe344, |
| 1491 | AARCH64_SYSREG_PRBAR2_EL1 = 0xc348, |
| 1492 | AARCH64_SYSREG_PRBAR2_EL2 = 0xe348, |
| 1493 | AARCH64_SYSREG_PRBAR3_EL1 = 0xc34c, |
| 1494 | AARCH64_SYSREG_PRBAR3_EL2 = 0xe34c, |
| 1495 | AARCH64_SYSREG_PRBAR4_EL1 = 0xc350, |
| 1496 | AARCH64_SYSREG_PRBAR4_EL2 = 0xe350, |
| 1497 | AARCH64_SYSREG_PRBAR5_EL1 = 0xc354, |
| 1498 | AARCH64_SYSREG_PRBAR5_EL2 = 0xe354, |
| 1499 | AARCH64_SYSREG_PRBAR6_EL1 = 0xc358, |
| 1500 | AARCH64_SYSREG_PRBAR6_EL2 = 0xe358, |
| 1501 | AARCH64_SYSREG_PRBAR7_EL1 = 0xc35c, |
| 1502 | AARCH64_SYSREG_PRBAR7_EL2 = 0xe35c, |
| 1503 | AARCH64_SYSREG_PRBAR8_EL1 = 0xc360, |
| 1504 | AARCH64_SYSREG_PRBAR8_EL2 = 0xe360, |
| 1505 | AARCH64_SYSREG_PRBAR9_EL1 = 0xc364, |
| 1506 | AARCH64_SYSREG_PRBAR9_EL2 = 0xe364, |
| 1507 | AARCH64_SYSREG_PRBAR_EL1 = 0xc340, |
| 1508 | AARCH64_SYSREG_PRBAR_EL2 = 0xe340, |
| 1509 | AARCH64_SYSREG_PRENR_EL1 = 0xc309, |
| 1510 | AARCH64_SYSREG_PRENR_EL2 = 0xe309, |
| 1511 | AARCH64_SYSREG_PRLAR10_EL1 = 0xc369, |
| 1512 | AARCH64_SYSREG_PRLAR10_EL2 = 0xe369, |
| 1513 | AARCH64_SYSREG_PRLAR11_EL1 = 0xc36d, |
| 1514 | AARCH64_SYSREG_PRLAR11_EL2 = 0xe36d, |
| 1515 | AARCH64_SYSREG_PRLAR12_EL1 = 0xc371, |
| 1516 | AARCH64_SYSREG_PRLAR12_EL2 = 0xe371, |
| 1517 | AARCH64_SYSREG_PRLAR13_EL1 = 0xc375, |
| 1518 | AARCH64_SYSREG_PRLAR13_EL2 = 0xe375, |
| 1519 | AARCH64_SYSREG_PRLAR14_EL1 = 0xc379, |
| 1520 | AARCH64_SYSREG_PRLAR14_EL2 = 0xe379, |
| 1521 | AARCH64_SYSREG_PRLAR15_EL1 = 0xc37d, |
| 1522 | AARCH64_SYSREG_PRLAR15_EL2 = 0xe37d, |
| 1523 | AARCH64_SYSREG_PRLAR1_EL1 = 0xc345, |
| 1524 | AARCH64_SYSREG_PRLAR1_EL2 = 0xe345, |
| 1525 | AARCH64_SYSREG_PRLAR2_EL1 = 0xc349, |
| 1526 | AARCH64_SYSREG_PRLAR2_EL2 = 0xe349, |
| 1527 | AARCH64_SYSREG_PRLAR3_EL1 = 0xc34d, |
| 1528 | AARCH64_SYSREG_PRLAR3_EL2 = 0xe34d, |
| 1529 | AARCH64_SYSREG_PRLAR4_EL1 = 0xc351, |
| 1530 | AARCH64_SYSREG_PRLAR4_EL2 = 0xe351, |
| 1531 | AARCH64_SYSREG_PRLAR5_EL1 = 0xc355, |
| 1532 | AARCH64_SYSREG_PRLAR5_EL2 = 0xe355, |
| 1533 | AARCH64_SYSREG_PRLAR6_EL1 = 0xc359, |
| 1534 | AARCH64_SYSREG_PRLAR6_EL2 = 0xe359, |
| 1535 | AARCH64_SYSREG_PRLAR7_EL1 = 0xc35d, |
| 1536 | AARCH64_SYSREG_PRLAR7_EL2 = 0xe35d, |
| 1537 | AARCH64_SYSREG_PRLAR8_EL1 = 0xc361, |
| 1538 | AARCH64_SYSREG_PRLAR8_EL2 = 0xe361, |
| 1539 | AARCH64_SYSREG_PRLAR9_EL1 = 0xc365, |
| 1540 | AARCH64_SYSREG_PRLAR9_EL2 = 0xe365, |
| 1541 | AARCH64_SYSREG_PRLAR_EL1 = 0xc341, |
| 1542 | AARCH64_SYSREG_PRLAR_EL2 = 0xe341, |
| 1543 | AARCH64_SYSREG_PRSELR_EL1 = 0xc311, |
| 1544 | AARCH64_SYSREG_PRSELR_EL2 = 0xe311, |
| 1545 | AARCH64_SYSREG_RCWMASK_EL1 = 0xc686, |
| 1546 | AARCH64_SYSREG_RCWSMASK_EL1 = 0xc683, |
| 1547 | AARCH64_SYSREG_REVIDR_EL1 = 0xc006, |
| 1548 | AARCH64_SYSREG_RGSR_EL1 = 0xc085, |
| 1549 | AARCH64_SYSREG_RMR_EL1 = 0xc602, |
| 1550 | AARCH64_SYSREG_RMR_EL2 = 0xe602, |
| 1551 | AARCH64_SYSREG_RMR_EL3 = 0xf602, |
| 1552 | AARCH64_SYSREG_RNDR = 0xd920, |
| 1553 | AARCH64_SYSREG_RNDRRS = 0xd921, |
| 1554 | AARCH64_SYSREG_RVBAR_EL1 = 0xc601, |
| 1555 | AARCH64_SYSREG_RVBAR_EL2 = 0xe601, |
| 1556 | AARCH64_SYSREG_RVBAR_EL3 = 0xf601, |
| 1557 | AARCH64_SYSREG_S2PIR_EL2 = 0xe515, |
| 1558 | AARCH64_SYSREG_S2POR_EL1 = 0xc515, |
| 1559 | AARCH64_SYSREG_SCR_EL3 = 0xf088, |
| 1560 | AARCH64_SYSREG_SCTLR2_EL1 = 0xc083, |
| 1561 | AARCH64_SYSREG_SCTLR2_EL12 = 0xe883, |
| 1562 | AARCH64_SYSREG_SCTLR2_EL2 = 0xe083, |
| 1563 | AARCH64_SYSREG_SCTLR2_EL3 = 0xf083, |
| 1564 | AARCH64_SYSREG_SCTLR_EL1 = 0xc080, |
| 1565 | AARCH64_SYSREG_SCTLR_EL12 = 0xe880, |
| 1566 | AARCH64_SYSREG_SCTLR_EL2 = 0xe080, |
| 1567 | AARCH64_SYSREG_SCTLR_EL3 = 0xf080, |
| 1568 | AARCH64_SYSREG_SCXTNUM_EL0 = 0xde87, |
| 1569 | AARCH64_SYSREG_SCXTNUM_EL1 = 0xc687, |
| 1570 | AARCH64_SYSREG_SCXTNUM_EL12 = 0xee87, |
| 1571 | AARCH64_SYSREG_SCXTNUM_EL2 = 0xe687, |
| 1572 | AARCH64_SYSREG_SCXTNUM_EL3 = 0xf687, |
| 1573 | AARCH64_SYSREG_SDER32_EL2 = 0xe099, |
| 1574 | AARCH64_SYSREG_SDER32_EL3 = 0xf089, |
| 1575 | AARCH64_SYSREG_SMCR_EL1 = 0xc096, |
| 1576 | AARCH64_SYSREG_SMCR_EL12 = 0xe896, |
| 1577 | AARCH64_SYSREG_SMCR_EL2 = 0xe096, |
| 1578 | AARCH64_SYSREG_SMCR_EL3 = 0xf096, |
| 1579 | AARCH64_SYSREG_SMIDR_EL1 = 0xc806, |
| 1580 | AARCH64_SYSREG_SMPRIMAP_EL2 = 0xe095, |
| 1581 | AARCH64_SYSREG_SMPRI_EL1 = 0xc094, |
| 1582 | AARCH64_SYSREG_SPMACCESSR_EL1 = 0x84eb, |
| 1583 | AARCH64_SYSREG_SPMACCESSR_EL12 = 0xaceb, |
| 1584 | AARCH64_SYSREG_SPMACCESSR_EL2 = 0xa4eb, |
| 1585 | AARCH64_SYSREG_SPMACCESSR_EL3 = 0xb4eb, |
| 1586 | AARCH64_SYSREG_SPMCFGR_EL1 = 0x84ef, |
| 1587 | AARCH64_SYSREG_SPMCGCR0_EL1 = 0x84e8, |
| 1588 | AARCH64_SYSREG_SPMCGCR1_EL1 = 0x84e9, |
| 1589 | AARCH64_SYSREG_SPMCNTENCLR_EL0 = 0x9ce2, |
| 1590 | AARCH64_SYSREG_SPMCNTENSET_EL0 = 0x9ce1, |
| 1591 | AARCH64_SYSREG_SPMCR_EL0 = 0x9ce0, |
| 1592 | AARCH64_SYSREG_SPMDEVAFF_EL1 = 0x84ee, |
| 1593 | AARCH64_SYSREG_SPMDEVARCH_EL1 = 0x84ed, |
| 1594 | AARCH64_SYSREG_SPMEVCNTR0_EL0 = 0x9f00, |
| 1595 | AARCH64_SYSREG_SPMEVCNTR10_EL0 = 0x9f0a, |
| 1596 | AARCH64_SYSREG_SPMEVCNTR11_EL0 = 0x9f0b, |
| 1597 | AARCH64_SYSREG_SPMEVCNTR12_EL0 = 0x9f0c, |
| 1598 | AARCH64_SYSREG_SPMEVCNTR13_EL0 = 0x9f0d, |
| 1599 | AARCH64_SYSREG_SPMEVCNTR14_EL0 = 0x9f0e, |
| 1600 | AARCH64_SYSREG_SPMEVCNTR15_EL0 = 0x9f0f, |
| 1601 | AARCH64_SYSREG_SPMEVCNTR1_EL0 = 0x9f01, |
| 1602 | AARCH64_SYSREG_SPMEVCNTR2_EL0 = 0x9f02, |
| 1603 | AARCH64_SYSREG_SPMEVCNTR3_EL0 = 0x9f03, |
| 1604 | AARCH64_SYSREG_SPMEVCNTR4_EL0 = 0x9f04, |
| 1605 | AARCH64_SYSREG_SPMEVCNTR5_EL0 = 0x9f05, |
| 1606 | AARCH64_SYSREG_SPMEVCNTR6_EL0 = 0x9f06, |
| 1607 | AARCH64_SYSREG_SPMEVCNTR7_EL0 = 0x9f07, |
| 1608 | AARCH64_SYSREG_SPMEVCNTR8_EL0 = 0x9f08, |
| 1609 | AARCH64_SYSREG_SPMEVCNTR9_EL0 = 0x9f09, |
| 1610 | AARCH64_SYSREG_SPMEVFILT2R0_EL0 = 0x9f30, |
| 1611 | AARCH64_SYSREG_SPMEVFILT2R10_EL0 = 0x9f3a, |
| 1612 | AARCH64_SYSREG_SPMEVFILT2R11_EL0 = 0x9f3b, |
| 1613 | AARCH64_SYSREG_SPMEVFILT2R12_EL0 = 0x9f3c, |
| 1614 | AARCH64_SYSREG_SPMEVFILT2R13_EL0 = 0x9f3d, |
| 1615 | AARCH64_SYSREG_SPMEVFILT2R14_EL0 = 0x9f3e, |
| 1616 | AARCH64_SYSREG_SPMEVFILT2R15_EL0 = 0x9f3f, |
| 1617 | AARCH64_SYSREG_SPMEVFILT2R1_EL0 = 0x9f31, |
| 1618 | AARCH64_SYSREG_SPMEVFILT2R2_EL0 = 0x9f32, |
| 1619 | AARCH64_SYSREG_SPMEVFILT2R3_EL0 = 0x9f33, |
| 1620 | AARCH64_SYSREG_SPMEVFILT2R4_EL0 = 0x9f34, |
| 1621 | AARCH64_SYSREG_SPMEVFILT2R5_EL0 = 0x9f35, |
| 1622 | AARCH64_SYSREG_SPMEVFILT2R6_EL0 = 0x9f36, |
| 1623 | AARCH64_SYSREG_SPMEVFILT2R7_EL0 = 0x9f37, |
| 1624 | AARCH64_SYSREG_SPMEVFILT2R8_EL0 = 0x9f38, |
| 1625 | AARCH64_SYSREG_SPMEVFILT2R9_EL0 = 0x9f39, |
| 1626 | AARCH64_SYSREG_SPMEVFILTR0_EL0 = 0x9f20, |
| 1627 | AARCH64_SYSREG_SPMEVFILTR10_EL0 = 0x9f2a, |
| 1628 | AARCH64_SYSREG_SPMEVFILTR11_EL0 = 0x9f2b, |
| 1629 | AARCH64_SYSREG_SPMEVFILTR12_EL0 = 0x9f2c, |
| 1630 | AARCH64_SYSREG_SPMEVFILTR13_EL0 = 0x9f2d, |
| 1631 | AARCH64_SYSREG_SPMEVFILTR14_EL0 = 0x9f2e, |
| 1632 | AARCH64_SYSREG_SPMEVFILTR15_EL0 = 0x9f2f, |
| 1633 | AARCH64_SYSREG_SPMEVFILTR1_EL0 = 0x9f21, |
| 1634 | AARCH64_SYSREG_SPMEVFILTR2_EL0 = 0x9f22, |
| 1635 | AARCH64_SYSREG_SPMEVFILTR3_EL0 = 0x9f23, |
| 1636 | AARCH64_SYSREG_SPMEVFILTR4_EL0 = 0x9f24, |
| 1637 | AARCH64_SYSREG_SPMEVFILTR5_EL0 = 0x9f25, |
| 1638 | AARCH64_SYSREG_SPMEVFILTR6_EL0 = 0x9f26, |
| 1639 | AARCH64_SYSREG_SPMEVFILTR7_EL0 = 0x9f27, |
| 1640 | AARCH64_SYSREG_SPMEVFILTR8_EL0 = 0x9f28, |
| 1641 | AARCH64_SYSREG_SPMEVFILTR9_EL0 = 0x9f29, |
| 1642 | AARCH64_SYSREG_SPMEVTYPER0_EL0 = 0x9f10, |
| 1643 | AARCH64_SYSREG_SPMEVTYPER10_EL0 = 0x9f1a, |
| 1644 | AARCH64_SYSREG_SPMEVTYPER11_EL0 = 0x9f1b, |
| 1645 | AARCH64_SYSREG_SPMEVTYPER12_EL0 = 0x9f1c, |
| 1646 | AARCH64_SYSREG_SPMEVTYPER13_EL0 = 0x9f1d, |
| 1647 | AARCH64_SYSREG_SPMEVTYPER14_EL0 = 0x9f1e, |
| 1648 | AARCH64_SYSREG_SPMEVTYPER15_EL0 = 0x9f1f, |
| 1649 | AARCH64_SYSREG_SPMEVTYPER1_EL0 = 0x9f11, |
| 1650 | AARCH64_SYSREG_SPMEVTYPER2_EL0 = 0x9f12, |
| 1651 | AARCH64_SYSREG_SPMEVTYPER3_EL0 = 0x9f13, |
| 1652 | AARCH64_SYSREG_SPMEVTYPER4_EL0 = 0x9f14, |
| 1653 | AARCH64_SYSREG_SPMEVTYPER5_EL0 = 0x9f15, |
| 1654 | AARCH64_SYSREG_SPMEVTYPER6_EL0 = 0x9f16, |
| 1655 | AARCH64_SYSREG_SPMEVTYPER7_EL0 = 0x9f17, |
| 1656 | AARCH64_SYSREG_SPMEVTYPER8_EL0 = 0x9f18, |
| 1657 | AARCH64_SYSREG_SPMEVTYPER9_EL0 = 0x9f19, |
| 1658 | AARCH64_SYSREG_SPMIIDR_EL1 = 0x84ec, |
| 1659 | AARCH64_SYSREG_SPMINTENCLR_EL1 = 0x84f2, |
| 1660 | AARCH64_SYSREG_SPMINTENSET_EL1 = 0x84f1, |
| 1661 | AARCH64_SYSREG_SPMOVSCLR_EL0 = 0x9ce3, |
| 1662 | AARCH64_SYSREG_SPMOVSSET_EL0 = 0x9cf3, |
| 1663 | AARCH64_SYSREG_SPMROOTCR_EL3 = 0xb4f7, |
| 1664 | AARCH64_SYSREG_SPMSCR_EL1 = 0xbcf7, |
| 1665 | AARCH64_SYSREG_SPMSELR_EL0 = 0x9ce5, |
| 1666 | AARCH64_SYSREG_SPMZR_EL0 = 0x9ce4, |
| 1667 | AARCH64_SYSREG_SPSEL = 0xc210, |
| 1668 | AARCH64_SYSREG_SPSR_ABT = 0xe219, |
| 1669 | AARCH64_SYSREG_SPSR_EL1 = 0xc200, |
| 1670 | AARCH64_SYSREG_SPSR_EL12 = 0xea00, |
| 1671 | AARCH64_SYSREG_SPSR_EL2 = 0xe200, |
| 1672 | AARCH64_SYSREG_SPSR_EL3 = 0xf200, |
| 1673 | AARCH64_SYSREG_SPSR_FIQ = 0xe21b, |
| 1674 | AARCH64_SYSREG_SPSR_IRQ = 0xe218, |
| 1675 | AARCH64_SYSREG_SPSR_UND = 0xe21a, |
| 1676 | AARCH64_SYSREG_SP_EL0 = 0xc208, |
| 1677 | AARCH64_SYSREG_SP_EL1 = 0xe208, |
| 1678 | AARCH64_SYSREG_SP_EL2 = 0xf208, |
| 1679 | AARCH64_SYSREG_SSBS = 0xda16, |
| 1680 | AARCH64_SYSREG_SVCR = 0xda12, |
| 1681 | AARCH64_SYSREG_TCO = 0xda17, |
| 1682 | AARCH64_SYSREG_TCR2_EL1 = 0xc103, |
| 1683 | AARCH64_SYSREG_TCR2_EL12 = 0xe903, |
| 1684 | AARCH64_SYSREG_TCR2_EL2 = 0xe103, |
| 1685 | AARCH64_SYSREG_TCR_EL1 = 0xc102, |
| 1686 | AARCH64_SYSREG_TCR_EL12 = 0xe902, |
| 1687 | AARCH64_SYSREG_TCR_EL2 = 0xe102, |
| 1688 | AARCH64_SYSREG_TCR_EL3 = 0xf102, |
| 1689 | AARCH64_SYSREG_TEECR32_EL1 = 0x9000, |
| 1690 | AARCH64_SYSREG_TEEHBR32_EL1 = 0x9080, |
| 1691 | AARCH64_SYSREG_TFSRE0_EL1 = 0xc2b1, |
| 1692 | AARCH64_SYSREG_TFSR_EL1 = 0xc2b0, |
| 1693 | AARCH64_SYSREG_TFSR_EL12 = 0xeab0, |
| 1694 | AARCH64_SYSREG_TFSR_EL2 = 0xe2b0, |
| 1695 | AARCH64_SYSREG_TFSR_EL3 = 0xf2b0, |
| 1696 | AARCH64_SYSREG_TPIDR2_EL0 = 0xde85, |
| 1697 | AARCH64_SYSREG_TPIDRRO_EL0 = 0xde83, |
| 1698 | AARCH64_SYSREG_TPIDR_EL0 = 0xde82, |
| 1699 | AARCH64_SYSREG_TPIDR_EL1 = 0xc684, |
| 1700 | AARCH64_SYSREG_TPIDR_EL2 = 0xe682, |
| 1701 | AARCH64_SYSREG_TPIDR_EL3 = 0xf682, |
| 1702 | AARCH64_SYSREG_TRBBASER_EL1 = 0xc4da, |
| 1703 | AARCH64_SYSREG_TRBIDR_EL1 = 0xc4df, |
| 1704 | AARCH64_SYSREG_TRBLIMITR_EL1 = 0xc4d8, |
| 1705 | AARCH64_SYSREG_TRBMAR_EL1 = 0xc4dc, |
| 1706 | AARCH64_SYSREG_TRBPTR_EL1 = 0xc4d9, |
| 1707 | AARCH64_SYSREG_TRBSR_EL1 = 0xc4db, |
| 1708 | AARCH64_SYSREG_TRBTRG_EL1 = 0xc4de, |
| 1709 | AARCH64_SYSREG_TRCACATR0 = 0x8902, |
| 1710 | AARCH64_SYSREG_TRCACATR1 = 0x8912, |
| 1711 | AARCH64_SYSREG_TRCACATR10 = 0x8923, |
| 1712 | AARCH64_SYSREG_TRCACATR11 = 0x8933, |
| 1713 | AARCH64_SYSREG_TRCACATR12 = 0x8943, |
| 1714 | AARCH64_SYSREG_TRCACATR13 = 0x8953, |
| 1715 | AARCH64_SYSREG_TRCACATR14 = 0x8963, |
| 1716 | AARCH64_SYSREG_TRCACATR15 = 0x8973, |
| 1717 | AARCH64_SYSREG_TRCACATR2 = 0x8922, |
| 1718 | AARCH64_SYSREG_TRCACATR3 = 0x8932, |
| 1719 | AARCH64_SYSREG_TRCACATR4 = 0x8942, |
| 1720 | AARCH64_SYSREG_TRCACATR5 = 0x8952, |
| 1721 | AARCH64_SYSREG_TRCACATR6 = 0x8962, |
| 1722 | AARCH64_SYSREG_TRCACATR7 = 0x8972, |
| 1723 | AARCH64_SYSREG_TRCACATR8 = 0x8903, |
| 1724 | AARCH64_SYSREG_TRCACATR9 = 0x8913, |
| 1725 | AARCH64_SYSREG_TRCACVR0 = 0x8900, |
| 1726 | AARCH64_SYSREG_TRCACVR1 = 0x8910, |
| 1727 | AARCH64_SYSREG_TRCACVR10 = 0x8921, |
| 1728 | AARCH64_SYSREG_TRCACVR11 = 0x8931, |
| 1729 | AARCH64_SYSREG_TRCACVR12 = 0x8941, |
| 1730 | AARCH64_SYSREG_TRCACVR13 = 0x8951, |
| 1731 | AARCH64_SYSREG_TRCACVR14 = 0x8961, |
| 1732 | AARCH64_SYSREG_TRCACVR15 = 0x8971, |
| 1733 | AARCH64_SYSREG_TRCACVR2 = 0x8920, |
| 1734 | AARCH64_SYSREG_TRCACVR3 = 0x8930, |
| 1735 | AARCH64_SYSREG_TRCACVR4 = 0x8940, |
| 1736 | AARCH64_SYSREG_TRCACVR5 = 0x8950, |
| 1737 | AARCH64_SYSREG_TRCACVR6 = 0x8960, |
| 1738 | AARCH64_SYSREG_TRCACVR7 = 0x8970, |
| 1739 | AARCH64_SYSREG_TRCACVR8 = 0x8901, |
| 1740 | AARCH64_SYSREG_TRCACVR9 = 0x8911, |
| 1741 | AARCH64_SYSREG_TRCAUTHSTATUS = 0x8bf6, |
| 1742 | AARCH64_SYSREG_TRCAUXCTLR = 0x8830, |
| 1743 | AARCH64_SYSREG_TRCBBCTLR = 0x8878, |
| 1744 | AARCH64_SYSREG_TRCCCCTLR = 0x8870, |
| 1745 | AARCH64_SYSREG_TRCCIDCCTLR0 = 0x8982, |
| 1746 | AARCH64_SYSREG_TRCCIDCCTLR1 = 0x898a, |
| 1747 | AARCH64_SYSREG_TRCCIDCVR0 = 0x8980, |
| 1748 | AARCH64_SYSREG_TRCCIDCVR1 = 0x8990, |
| 1749 | AARCH64_SYSREG_TRCCIDCVR2 = 0x89a0, |
| 1750 | AARCH64_SYSREG_TRCCIDCVR3 = 0x89b0, |
| 1751 | AARCH64_SYSREG_TRCCIDCVR4 = 0x89c0, |
| 1752 | AARCH64_SYSREG_TRCCIDCVR5 = 0x89d0, |
| 1753 | AARCH64_SYSREG_TRCCIDCVR6 = 0x89e0, |
| 1754 | AARCH64_SYSREG_TRCCIDCVR7 = 0x89f0, |
| 1755 | AARCH64_SYSREG_TRCCIDR0 = 0x8be7, |
| 1756 | AARCH64_SYSREG_TRCCIDR1 = 0x8bef, |
| 1757 | AARCH64_SYSREG_TRCCIDR2 = 0x8bf7, |
| 1758 | AARCH64_SYSREG_TRCCIDR3 = 0x8bff, |
| 1759 | AARCH64_SYSREG_TRCCLAIMCLR = 0x8bce, |
| 1760 | AARCH64_SYSREG_TRCCLAIMSET = 0x8bc6, |
| 1761 | AARCH64_SYSREG_TRCCNTCTLR0 = 0x8825, |
| 1762 | AARCH64_SYSREG_TRCCNTCTLR1 = 0x882d, |
| 1763 | AARCH64_SYSREG_TRCCNTCTLR2 = 0x8835, |
| 1764 | AARCH64_SYSREG_TRCCNTCTLR3 = 0x883d, |
| 1765 | AARCH64_SYSREG_TRCCNTRLDVR0 = 0x8805, |
| 1766 | AARCH64_SYSREG_TRCCNTRLDVR1 = 0x880d, |
| 1767 | AARCH64_SYSREG_TRCCNTRLDVR2 = 0x8815, |
| 1768 | AARCH64_SYSREG_TRCCNTRLDVR3 = 0x881d, |
| 1769 | AARCH64_SYSREG_TRCCNTVR0 = 0x8845, |
| 1770 | AARCH64_SYSREG_TRCCNTVR1 = 0x884d, |
| 1771 | AARCH64_SYSREG_TRCCNTVR2 = 0x8855, |
| 1772 | AARCH64_SYSREG_TRCCNTVR3 = 0x885d, |
| 1773 | AARCH64_SYSREG_TRCCONFIGR = 0x8820, |
| 1774 | AARCH64_SYSREG_TRCDEVAFF0 = 0x8bd6, |
| 1775 | AARCH64_SYSREG_TRCDEVAFF1 = 0x8bde, |
| 1776 | AARCH64_SYSREG_TRCDEVARCH = 0x8bfe, |
| 1777 | AARCH64_SYSREG_TRCDEVID = 0x8b97, |
| 1778 | AARCH64_SYSREG_TRCDEVTYPE = 0x8b9f, |
| 1779 | AARCH64_SYSREG_TRCDVCMR0 = 0x8906, |
| 1780 | AARCH64_SYSREG_TRCDVCMR1 = 0x8926, |
| 1781 | AARCH64_SYSREG_TRCDVCMR2 = 0x8946, |
| 1782 | AARCH64_SYSREG_TRCDVCMR3 = 0x8966, |
| 1783 | AARCH64_SYSREG_TRCDVCMR4 = 0x8907, |
| 1784 | AARCH64_SYSREG_TRCDVCMR5 = 0x8927, |
| 1785 | AARCH64_SYSREG_TRCDVCMR6 = 0x8947, |
| 1786 | AARCH64_SYSREG_TRCDVCMR7 = 0x8967, |
| 1787 | AARCH64_SYSREG_TRCDVCVR0 = 0x8904, |
| 1788 | AARCH64_SYSREG_TRCDVCVR1 = 0x8924, |
| 1789 | AARCH64_SYSREG_TRCDVCVR2 = 0x8944, |
| 1790 | AARCH64_SYSREG_TRCDVCVR3 = 0x8964, |
| 1791 | AARCH64_SYSREG_TRCDVCVR4 = 0x8905, |
| 1792 | AARCH64_SYSREG_TRCDVCVR5 = 0x8925, |
| 1793 | AARCH64_SYSREG_TRCDVCVR6 = 0x8945, |
| 1794 | AARCH64_SYSREG_TRCDVCVR7 = 0x8965, |
| 1795 | AARCH64_SYSREG_TRCEVENTCTL0R = 0x8840, |
| 1796 | AARCH64_SYSREG_TRCEVENTCTL1R = 0x8848, |
| 1797 | AARCH64_SYSREG_TRCEXTINSELR = 0x8844, |
| 1798 | AARCH64_SYSREG_TRCEXTINSELR0 = 0x8844, |
| 1799 | AARCH64_SYSREG_TRCEXTINSELR1 = 0x884c, |
| 1800 | AARCH64_SYSREG_TRCEXTINSELR2 = 0x8854, |
| 1801 | AARCH64_SYSREG_TRCEXTINSELR3 = 0x885c, |
| 1802 | AARCH64_SYSREG_TRCIDR0 = 0x8847, |
| 1803 | AARCH64_SYSREG_TRCIDR1 = 0x884f, |
| 1804 | AARCH64_SYSREG_TRCIDR10 = 0x8816, |
| 1805 | AARCH64_SYSREG_TRCIDR11 = 0x881e, |
| 1806 | AARCH64_SYSREG_TRCIDR12 = 0x8826, |
| 1807 | AARCH64_SYSREG_TRCIDR13 = 0x882e, |
| 1808 | AARCH64_SYSREG_TRCIDR2 = 0x8857, |
| 1809 | AARCH64_SYSREG_TRCIDR3 = 0x885f, |
| 1810 | AARCH64_SYSREG_TRCIDR4 = 0x8867, |
| 1811 | AARCH64_SYSREG_TRCIDR5 = 0x886f, |
| 1812 | AARCH64_SYSREG_TRCIDR6 = 0x8877, |
| 1813 | AARCH64_SYSREG_TRCIDR7 = 0x887f, |
| 1814 | AARCH64_SYSREG_TRCIDR8 = 0x8806, |
| 1815 | AARCH64_SYSREG_TRCIDR9 = 0x880e, |
| 1816 | AARCH64_SYSREG_TRCIMSPEC0 = 0x8807, |
| 1817 | AARCH64_SYSREG_TRCIMSPEC1 = 0x880f, |
| 1818 | AARCH64_SYSREG_TRCIMSPEC2 = 0x8817, |
| 1819 | AARCH64_SYSREG_TRCIMSPEC3 = 0x881f, |
| 1820 | AARCH64_SYSREG_TRCIMSPEC4 = 0x8827, |
| 1821 | AARCH64_SYSREG_TRCIMSPEC5 = 0x882f, |
| 1822 | AARCH64_SYSREG_TRCIMSPEC6 = 0x8837, |
| 1823 | AARCH64_SYSREG_TRCIMSPEC7 = 0x883f, |
| 1824 | AARCH64_SYSREG_TRCITCTRL = 0x8b84, |
| 1825 | AARCH64_SYSREG_TRCITECR_EL1 = 0xc093, |
| 1826 | AARCH64_SYSREG_TRCITECR_EL12 = 0xe893, |
| 1827 | AARCH64_SYSREG_TRCITECR_EL2 = 0xe093, |
| 1828 | AARCH64_SYSREG_TRCITEEDCR = 0x8811, |
| 1829 | AARCH64_SYSREG_TRCLAR = 0x8be6, |
| 1830 | AARCH64_SYSREG_TRCLSR = 0x8bee, |
| 1831 | AARCH64_SYSREG_TRCOSLAR = 0x8884, |
| 1832 | AARCH64_SYSREG_TRCOSLSR = 0x888c, |
| 1833 | AARCH64_SYSREG_TRCPDCR = 0x88a4, |
| 1834 | AARCH64_SYSREG_TRCPDSR = 0x88ac, |
| 1835 | AARCH64_SYSREG_TRCPIDR0 = 0x8bc7, |
| 1836 | AARCH64_SYSREG_TRCPIDR1 = 0x8bcf, |
| 1837 | AARCH64_SYSREG_TRCPIDR2 = 0x8bd7, |
| 1838 | AARCH64_SYSREG_TRCPIDR3 = 0x8bdf, |
| 1839 | AARCH64_SYSREG_TRCPIDR4 = 0x8ba7, |
| 1840 | AARCH64_SYSREG_TRCPIDR5 = 0x8baf, |
| 1841 | AARCH64_SYSREG_TRCPIDR6 = 0x8bb7, |
| 1842 | AARCH64_SYSREG_TRCPIDR7 = 0x8bbf, |
| 1843 | AARCH64_SYSREG_TRCPRGCTLR = 0x8808, |
| 1844 | AARCH64_SYSREG_TRCPROCSELR = 0x8810, |
| 1845 | AARCH64_SYSREG_TRCQCTLR = 0x8809, |
| 1846 | AARCH64_SYSREG_TRCRSCTLR10 = 0x88d0, |
| 1847 | AARCH64_SYSREG_TRCRSCTLR11 = 0x88d8, |
| 1848 | AARCH64_SYSREG_TRCRSCTLR12 = 0x88e0, |
| 1849 | AARCH64_SYSREG_TRCRSCTLR13 = 0x88e8, |
| 1850 | AARCH64_SYSREG_TRCRSCTLR14 = 0x88f0, |
| 1851 | AARCH64_SYSREG_TRCRSCTLR15 = 0x88f8, |
| 1852 | AARCH64_SYSREG_TRCRSCTLR16 = 0x8881, |
| 1853 | AARCH64_SYSREG_TRCRSCTLR17 = 0x8889, |
| 1854 | AARCH64_SYSREG_TRCRSCTLR18 = 0x8891, |
| 1855 | AARCH64_SYSREG_TRCRSCTLR19 = 0x8899, |
| 1856 | AARCH64_SYSREG_TRCRSCTLR2 = 0x8890, |
| 1857 | AARCH64_SYSREG_TRCRSCTLR20 = 0x88a1, |
| 1858 | AARCH64_SYSREG_TRCRSCTLR21 = 0x88a9, |
| 1859 | AARCH64_SYSREG_TRCRSCTLR22 = 0x88b1, |
| 1860 | AARCH64_SYSREG_TRCRSCTLR23 = 0x88b9, |
| 1861 | AARCH64_SYSREG_TRCRSCTLR24 = 0x88c1, |
| 1862 | AARCH64_SYSREG_TRCRSCTLR25 = 0x88c9, |
| 1863 | AARCH64_SYSREG_TRCRSCTLR26 = 0x88d1, |
| 1864 | AARCH64_SYSREG_TRCRSCTLR27 = 0x88d9, |
| 1865 | AARCH64_SYSREG_TRCRSCTLR28 = 0x88e1, |
| 1866 | AARCH64_SYSREG_TRCRSCTLR29 = 0x88e9, |
| 1867 | AARCH64_SYSREG_TRCRSCTLR3 = 0x8898, |
| 1868 | AARCH64_SYSREG_TRCRSCTLR30 = 0x88f1, |
| 1869 | AARCH64_SYSREG_TRCRSCTLR31 = 0x88f9, |
| 1870 | AARCH64_SYSREG_TRCRSCTLR4 = 0x88a0, |
| 1871 | AARCH64_SYSREG_TRCRSCTLR5 = 0x88a8, |
| 1872 | AARCH64_SYSREG_TRCRSCTLR6 = 0x88b0, |
| 1873 | AARCH64_SYSREG_TRCRSCTLR7 = 0x88b8, |
| 1874 | AARCH64_SYSREG_TRCRSCTLR8 = 0x88c0, |
| 1875 | AARCH64_SYSREG_TRCRSCTLR9 = 0x88c8, |
| 1876 | AARCH64_SYSREG_TRCRSR = 0x8850, |
| 1877 | AARCH64_SYSREG_TRCSEQEVR0 = 0x8804, |
| 1878 | AARCH64_SYSREG_TRCSEQEVR1 = 0x880c, |
| 1879 | AARCH64_SYSREG_TRCSEQEVR2 = 0x8814, |
| 1880 | AARCH64_SYSREG_TRCSEQRSTEVR = 0x8834, |
| 1881 | AARCH64_SYSREG_TRCSEQSTR = 0x883c, |
| 1882 | AARCH64_SYSREG_TRCSSCCR0 = 0x8882, |
| 1883 | AARCH64_SYSREG_TRCSSCCR1 = 0x888a, |
| 1884 | AARCH64_SYSREG_TRCSSCCR2 = 0x8892, |
| 1885 | AARCH64_SYSREG_TRCSSCCR3 = 0x889a, |
| 1886 | AARCH64_SYSREG_TRCSSCCR4 = 0x88a2, |
| 1887 | AARCH64_SYSREG_TRCSSCCR5 = 0x88aa, |
| 1888 | AARCH64_SYSREG_TRCSSCCR6 = 0x88b2, |
| 1889 | AARCH64_SYSREG_TRCSSCCR7 = 0x88ba, |
| 1890 | AARCH64_SYSREG_TRCSSCSR0 = 0x88c2, |
| 1891 | AARCH64_SYSREG_TRCSSCSR1 = 0x88ca, |
| 1892 | AARCH64_SYSREG_TRCSSCSR2 = 0x88d2, |
| 1893 | AARCH64_SYSREG_TRCSSCSR3 = 0x88da, |
| 1894 | AARCH64_SYSREG_TRCSSCSR4 = 0x88e2, |
| 1895 | AARCH64_SYSREG_TRCSSCSR5 = 0x88ea, |
| 1896 | AARCH64_SYSREG_TRCSSCSR6 = 0x88f2, |
| 1897 | AARCH64_SYSREG_TRCSSCSR7 = 0x88fa, |
| 1898 | AARCH64_SYSREG_TRCSSPCICR0 = 0x8883, |
| 1899 | AARCH64_SYSREG_TRCSSPCICR1 = 0x888b, |
| 1900 | AARCH64_SYSREG_TRCSSPCICR2 = 0x8893, |
| 1901 | AARCH64_SYSREG_TRCSSPCICR3 = 0x889b, |
| 1902 | AARCH64_SYSREG_TRCSSPCICR4 = 0x88a3, |
| 1903 | AARCH64_SYSREG_TRCSSPCICR5 = 0x88ab, |
| 1904 | AARCH64_SYSREG_TRCSSPCICR6 = 0x88b3, |
| 1905 | AARCH64_SYSREG_TRCSSPCICR7 = 0x88bb, |
| 1906 | AARCH64_SYSREG_TRCSTALLCTLR = 0x8858, |
| 1907 | AARCH64_SYSREG_TRCSTATR = 0x8818, |
| 1908 | AARCH64_SYSREG_TRCSYNCPR = 0x8868, |
| 1909 | AARCH64_SYSREG_TRCTRACEIDR = 0x8801, |
| 1910 | AARCH64_SYSREG_TRCTSCTLR = 0x8860, |
| 1911 | AARCH64_SYSREG_TRCVDARCCTLR = 0x8852, |
| 1912 | AARCH64_SYSREG_TRCVDCTLR = 0x8842, |
| 1913 | AARCH64_SYSREG_TRCVDSACCTLR = 0x884a, |
| 1914 | AARCH64_SYSREG_TRCVICTLR = 0x8802, |
| 1915 | AARCH64_SYSREG_TRCVIIECTLR = 0x880a, |
| 1916 | AARCH64_SYSREG_TRCVIPCSSCTLR = 0x881a, |
| 1917 | AARCH64_SYSREG_TRCVISSCTLR = 0x8812, |
| 1918 | AARCH64_SYSREG_TRCVMIDCCTLR0 = 0x8992, |
| 1919 | AARCH64_SYSREG_TRCVMIDCCTLR1 = 0x899a, |
| 1920 | AARCH64_SYSREG_TRCVMIDCVR0 = 0x8981, |
| 1921 | AARCH64_SYSREG_TRCVMIDCVR1 = 0x8991, |
| 1922 | AARCH64_SYSREG_TRCVMIDCVR2 = 0x89a1, |
| 1923 | AARCH64_SYSREG_TRCVMIDCVR3 = 0x89b1, |
| 1924 | AARCH64_SYSREG_TRCVMIDCVR4 = 0x89c1, |
| 1925 | AARCH64_SYSREG_TRCVMIDCVR5 = 0x89d1, |
| 1926 | AARCH64_SYSREG_TRCVMIDCVR6 = 0x89e1, |
| 1927 | AARCH64_SYSREG_TRCVMIDCVR7 = 0x89f1, |
| 1928 | AARCH64_SYSREG_TRFCR_EL1 = 0xc091, |
| 1929 | AARCH64_SYSREG_TRFCR_EL12 = 0xe891, |
| 1930 | AARCH64_SYSREG_TRFCR_EL2 = 0xe091, |
| 1931 | AARCH64_SYSREG_TTBR0_EL1 = 0xc100, |
| 1932 | AARCH64_SYSREG_TTBR0_EL12 = 0xe900, |
| 1933 | AARCH64_SYSREG_TTBR0_EL2 = 0xe100, |
| 1934 | AARCH64_SYSREG_VSCTLR_EL2 = 0xe100, |
| 1935 | AARCH64_SYSREG_TTBR0_EL3 = 0xf100, |
| 1936 | AARCH64_SYSREG_TTBR1_EL1 = 0xc101, |
| 1937 | AARCH64_SYSREG_TTBR1_EL12 = 0xe901, |
| 1938 | AARCH64_SYSREG_TTBR1_EL2 = 0xe101, |
| 1939 | AARCH64_SYSREG_UAO = 0xc214, |
| 1940 | AARCH64_SYSREG_VBAR_EL1 = 0xc600, |
| 1941 | AARCH64_SYSREG_VBAR_EL12 = 0xee00, |
| 1942 | AARCH64_SYSREG_VBAR_EL2 = 0xe600, |
| 1943 | AARCH64_SYSREG_VBAR_EL3 = 0xf600, |
| 1944 | AARCH64_SYSREG_VDISR_EL2 = 0xe609, |
| 1945 | AARCH64_SYSREG_VDISR_EL3 = 0xf609, |
| 1946 | AARCH64_SYSREG_VMECID_A_EL2 = 0xe549, |
| 1947 | AARCH64_SYSREG_VMECID_P_EL2 = 0xe548, |
| 1948 | AARCH64_SYSREG_VMPIDR_EL2 = 0xe005, |
| 1949 | AARCH64_SYSREG_VNCR_EL2 = 0xe110, |
| 1950 | AARCH64_SYSREG_VPIDR_EL2 = 0xe000, |
| 1951 | AARCH64_SYSREG_VSESR_EL2 = 0xe293, |
| 1952 | AARCH64_SYSREG_VSESR_EL3 = 0xf293, |
| 1953 | AARCH64_SYSREG_VSTCR_EL2 = 0xe132, |
| 1954 | AARCH64_SYSREG_VSTTBR_EL2 = 0xe130, |
| 1955 | AARCH64_SYSREG_VTCR_EL2 = 0xe10a, |
| 1956 | AARCH64_SYSREG_VTTBR_EL2 = 0xe108, |
| 1957 | AARCH64_SYSREG_ZCR_EL1 = 0xc090, |
| 1958 | AARCH64_SYSREG_ZCR_EL12 = 0xe890, |
| 1959 | AARCH64_SYSREG_ZCR_EL2 = 0xe090, |
| 1960 | AARCH64_SYSREG_ZCR_EL3 = 0xf090, |
| 1961 | |
| 1962 | // clang-format on |
| 1963 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_SysReg> end |
| 1964 | AARCH64_SYSREG_ENDING = UINT16_MAX, |
| 1965 | } aarch64_sysreg; |
| 1966 | |
| 1967 | typedef enum { |
| 1968 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_TSB> begin |
| 1969 | // clang-format off |
| 1970 | |
| 1971 | AARCH64_TSB_CSYNC = 0x0, |
| 1972 | |
| 1973 | // clang-format on |
| 1974 | // generated content <AArch64GenCSSystemOperandsEnum.inc:GET_ENUM_VALUES_TSB> end |
| 1975 | AARCH64_TSB_ENDING, |
| 1976 | } aarch64_tsb; |
| 1977 | |
| 1978 | typedef union { |
| 1979 | aarch64_sysreg sysreg; |
| 1980 | aarch64_tlbi tlbi; |
| 1981 | aarch64_ic ic; |
| 1982 | int raw_val; |
| 1983 | } aarch64_sysop_reg; |
| 1984 | |
| 1985 | typedef union { |
| 1986 | aarch64_dbnxs dbnxs; |
| 1987 | aarch64_exactfpimm exactfpimm; |
| 1988 | int raw_val; |
| 1989 | } aarch64_sysop_imm; |
| 1990 | |
| 1991 | typedef union { |
| 1992 | aarch64_svcr svcr; |
| 1993 | aarch64_at at; |
| 1994 | aarch64_db db; |
| 1995 | aarch64_dc dc; |
| 1996 | aarch64_isb isb; |
| 1997 | aarch64_tsb tsb; |
| 1998 | aarch64_prfm prfm; |
| 1999 | aarch64_sveprfm sveprfm; |
| 2000 | aarch64_rprfm rprfm; |
| 2001 | aarch64_pstateimm0_15 pstateimm0_15; |
| 2002 | aarch64_pstateimm0_1 pstateimm0_1; |
| 2003 | aarch64_psb psb; |
| 2004 | aarch64_bti bti; |
| 2005 | aarch64_svepredpat svepredpat; |
| 2006 | aarch64_sveveclenspecifier sveveclenspecifier; |
| 2007 | int raw_val; |
| 2008 | } aarch64_sysop_alias; |
| 2009 | |
| 2010 | /// Operand type for instruction's operands |
| 2011 | typedef enum aarch64_op_type { |
| 2012 | AARCH64_OP_INVALID = CS_OP_INVALID, ///< = CS_OP_INVALID (Uninitialized). |
| 2013 | AARCH64_OP_REG = CS_OP_REG, ///< = CS_OP_REG (Register operand). |
| 2014 | AARCH64_OP_IMM = CS_OP_IMM, ///< = CS_OP_IMM (Immediate operand). |
| 2015 | AARCH64_OP_MEM_REG = CS_OP_MEM_REG, ///< Register which references memory. |
| 2016 | AARCH64_OP_MEM_IMM = CS_OP_MEM_IMM, ///< = Immediate value which references memory. |
| 2017 | AARCH64_OP_MEM = CS_OP_MEM, ///< = CS_OP_MEM (Memory operand). |
| 2018 | AARCH64_OP_FP = CS_OP_FP, ///< = CS_OP_FP (Floating-Point operand). |
| 2019 | AARCH64_OP_CIMM = CS_OP_SPECIAL + 0, ///< C-Immediate |
| 2020 | AARCH64_OP_REG_MRS = CS_OP_SPECIAL + 1, ///< MRS register operand. |
| 2021 | AARCH64_OP_REG_MSR = CS_OP_SPECIAL + 2, ///< MSR register operand. |
| 2022 | AARCH64_OP_IMPLICIT_IMM_0 = CS_OP_SPECIAL + 3, ///< Implicit immediate operand 0 |
| 2023 | // Different system operands. |
| 2024 | AARCH64_OP_SVCR = CS_OP_SPECIAL + 4, |
| 2025 | AARCH64_OP_AT = CS_OP_SPECIAL + 5, |
| 2026 | AARCH64_OP_DB = CS_OP_SPECIAL + 6, |
| 2027 | AARCH64_OP_DC = CS_OP_SPECIAL + 7, |
| 2028 | AARCH64_OP_ISB = CS_OP_SPECIAL + 8, |
| 2029 | AARCH64_OP_TSB = CS_OP_SPECIAL + 9, |
| 2030 | AARCH64_OP_PRFM = CS_OP_SPECIAL + 10, |
| 2031 | AARCH64_OP_SVEPRFM = CS_OP_SPECIAL + 11, |
| 2032 | AARCH64_OP_RPRFM = CS_OP_SPECIAL + 12, |
| 2033 | AARCH64_OP_PSTATEIMM0_15 = CS_OP_SPECIAL + 13, |
| 2034 | AARCH64_OP_PSTATEIMM0_1 = CS_OP_SPECIAL + 14, |
| 2035 | AARCH64_OP_PSB = CS_OP_SPECIAL + 15, |
| 2036 | AARCH64_OP_BTI = CS_OP_SPECIAL + 16, |
| 2037 | AARCH64_OP_SVEPREDPAT = CS_OP_SPECIAL + 17, |
| 2038 | AARCH64_OP_SVEVECLENSPECIFIER = CS_OP_SPECIAL + 18, |
| 2039 | AARCH64_OP_SME = CS_OP_SPECIAL + 19, |
| 2040 | AARCH64_OP_IMM_RANGE = CS_OP_SPECIAL + 20, |
| 2041 | AARCH64_OP_TLBI = CS_OP_SPECIAL + 21, |
| 2042 | AARCH64_OP_IC = CS_OP_SPECIAL + 22, |
| 2043 | AARCH64_OP_DBNXS = CS_OP_SPECIAL + 23, |
| 2044 | AARCH64_OP_EXACTFPIMM = CS_OP_SPECIAL + 24, |
| 2045 | AARCH64_OP_SYSREG = CS_OP_SPECIAL + 25, |
| 2046 | AARCH64_OP_SYSIMM = CS_OP_SPECIAL + 26, |
| 2047 | AARCH64_OP_SYSALIAS = CS_OP_SPECIAL + 27, |
| 2048 | AARCH64_OP_PRED = CS_OP_SPECIAL + 28, |
| 2049 | } aarch64_op_type; |
| 2050 | |
| 2051 | typedef struct { |
| 2052 | aarch64_sysop_reg reg; |
| 2053 | aarch64_sysop_imm imm; |
| 2054 | aarch64_sysop_alias alias; |
| 2055 | aarch64_op_type sub_type; ///< Specifies which field is set. |
| 2056 | } aarch64_sysop; |
| 2057 | |
| 2058 | /// AArch64 registers |
| 2059 | typedef enum aarch64_reg { |
| 2060 | // generated content <AArch64GenCSRegEnum.inc> begin |
| 2061 | // clang-format off |
| 2062 | |
| 2063 | AARCH64_REG_INVALID = 0, |
| 2064 | AARCH64_REG_FFR = 1, |
| 2065 | AARCH64_REG_FP = 2, |
| 2066 | AARCH64_REG_FPCR = 3, |
| 2067 | AARCH64_REG_LR = 4, |
| 2068 | AARCH64_REG_NZCV = 5, |
| 2069 | AARCH64_REG_SP = 6, |
| 2070 | AARCH64_REG_VG = 7, |
| 2071 | AARCH64_REG_WSP = 8, |
| 2072 | AARCH64_REG_WZR = 9, |
| 2073 | AARCH64_REG_XZR = 10, |
| 2074 | AARCH64_REG_ZA = 11, |
| 2075 | AARCH64_REG_B0 = 12, |
| 2076 | AARCH64_REG_B1 = 13, |
| 2077 | AARCH64_REG_B2 = 14, |
| 2078 | AARCH64_REG_B3 = 15, |
| 2079 | AARCH64_REG_B4 = 16, |
| 2080 | AARCH64_REG_B5 = 17, |
| 2081 | AARCH64_REG_B6 = 18, |
| 2082 | AARCH64_REG_B7 = 19, |
| 2083 | AARCH64_REG_B8 = 20, |
| 2084 | AARCH64_REG_B9 = 21, |
| 2085 | AARCH64_REG_B10 = 22, |
| 2086 | AARCH64_REG_B11 = 23, |
| 2087 | AARCH64_REG_B12 = 24, |
| 2088 | AARCH64_REG_B13 = 25, |
| 2089 | AARCH64_REG_B14 = 26, |
| 2090 | AARCH64_REG_B15 = 27, |
| 2091 | AARCH64_REG_B16 = 28, |
| 2092 | AARCH64_REG_B17 = 29, |
| 2093 | AARCH64_REG_B18 = 30, |
| 2094 | AARCH64_REG_B19 = 31, |
| 2095 | AARCH64_REG_B20 = 32, |
| 2096 | AARCH64_REG_B21 = 33, |
| 2097 | AARCH64_REG_B22 = 34, |
| 2098 | AARCH64_REG_B23 = 35, |
| 2099 | AARCH64_REG_B24 = 36, |
| 2100 | AARCH64_REG_B25 = 37, |
| 2101 | AARCH64_REG_B26 = 38, |
| 2102 | AARCH64_REG_B27 = 39, |
| 2103 | AARCH64_REG_B28 = 40, |
| 2104 | AARCH64_REG_B29 = 41, |
| 2105 | AARCH64_REG_B30 = 42, |
| 2106 | AARCH64_REG_B31 = 43, |
| 2107 | AARCH64_REG_D0 = 44, |
| 2108 | AARCH64_REG_D1 = 45, |
| 2109 | AARCH64_REG_D2 = 46, |
| 2110 | AARCH64_REG_D3 = 47, |
| 2111 | AARCH64_REG_D4 = 48, |
| 2112 | AARCH64_REG_D5 = 49, |
| 2113 | AARCH64_REG_D6 = 50, |
| 2114 | AARCH64_REG_D7 = 51, |
| 2115 | AARCH64_REG_D8 = 52, |
| 2116 | AARCH64_REG_D9 = 53, |
| 2117 | AARCH64_REG_D10 = 54, |
| 2118 | AARCH64_REG_D11 = 55, |
| 2119 | AARCH64_REG_D12 = 56, |
| 2120 | AARCH64_REG_D13 = 57, |
| 2121 | AARCH64_REG_D14 = 58, |
| 2122 | AARCH64_REG_D15 = 59, |
| 2123 | AARCH64_REG_D16 = 60, |
| 2124 | AARCH64_REG_D17 = 61, |
| 2125 | AARCH64_REG_D18 = 62, |
| 2126 | AARCH64_REG_D19 = 63, |
| 2127 | AARCH64_REG_D20 = 64, |
| 2128 | AARCH64_REG_D21 = 65, |
| 2129 | AARCH64_REG_D22 = 66, |
| 2130 | AARCH64_REG_D23 = 67, |
| 2131 | AARCH64_REG_D24 = 68, |
| 2132 | AARCH64_REG_D25 = 69, |
| 2133 | AARCH64_REG_D26 = 70, |
| 2134 | AARCH64_REG_D27 = 71, |
| 2135 | AARCH64_REG_D28 = 72, |
| 2136 | AARCH64_REG_D29 = 73, |
| 2137 | AARCH64_REG_D30 = 74, |
| 2138 | AARCH64_REG_D31 = 75, |
| 2139 | AARCH64_REG_H0 = 76, |
| 2140 | AARCH64_REG_H1 = 77, |
| 2141 | AARCH64_REG_H2 = 78, |
| 2142 | AARCH64_REG_H3 = 79, |
| 2143 | AARCH64_REG_H4 = 80, |
| 2144 | AARCH64_REG_H5 = 81, |
| 2145 | AARCH64_REG_H6 = 82, |
| 2146 | AARCH64_REG_H7 = 83, |
| 2147 | AARCH64_REG_H8 = 84, |
| 2148 | AARCH64_REG_H9 = 85, |
| 2149 | AARCH64_REG_H10 = 86, |
| 2150 | AARCH64_REG_H11 = 87, |
| 2151 | AARCH64_REG_H12 = 88, |
| 2152 | AARCH64_REG_H13 = 89, |
| 2153 | AARCH64_REG_H14 = 90, |
| 2154 | AARCH64_REG_H15 = 91, |
| 2155 | AARCH64_REG_H16 = 92, |
| 2156 | AARCH64_REG_H17 = 93, |
| 2157 | AARCH64_REG_H18 = 94, |
| 2158 | AARCH64_REG_H19 = 95, |
| 2159 | AARCH64_REG_H20 = 96, |
| 2160 | AARCH64_REG_H21 = 97, |
| 2161 | AARCH64_REG_H22 = 98, |
| 2162 | AARCH64_REG_H23 = 99, |
| 2163 | AARCH64_REG_H24 = 100, |
| 2164 | AARCH64_REG_H25 = 101, |
| 2165 | AARCH64_REG_H26 = 102, |
| 2166 | AARCH64_REG_H27 = 103, |
| 2167 | AARCH64_REG_H28 = 104, |
| 2168 | AARCH64_REG_H29 = 105, |
| 2169 | AARCH64_REG_H30 = 106, |
| 2170 | AARCH64_REG_H31 = 107, |
| 2171 | AARCH64_REG_P0 = 108, |
| 2172 | AARCH64_REG_P1 = 109, |
| 2173 | AARCH64_REG_P2 = 110, |
| 2174 | AARCH64_REG_P3 = 111, |
| 2175 | AARCH64_REG_P4 = 112, |
| 2176 | AARCH64_REG_P5 = 113, |
| 2177 | AARCH64_REG_P6 = 114, |
| 2178 | AARCH64_REG_P7 = 115, |
| 2179 | AARCH64_REG_P8 = 116, |
| 2180 | AARCH64_REG_P9 = 117, |
| 2181 | AARCH64_REG_P10 = 118, |
| 2182 | AARCH64_REG_P11 = 119, |
| 2183 | AARCH64_REG_P12 = 120, |
| 2184 | AARCH64_REG_P13 = 121, |
| 2185 | AARCH64_REG_P14 = 122, |
| 2186 | AARCH64_REG_P15 = 123, |
| 2187 | AARCH64_REG_PN0 = 124, |
| 2188 | AARCH64_REG_PN1 = 125, |
| 2189 | AARCH64_REG_PN2 = 126, |
| 2190 | AARCH64_REG_PN3 = 127, |
| 2191 | AARCH64_REG_PN4 = 128, |
| 2192 | AARCH64_REG_PN5 = 129, |
| 2193 | AARCH64_REG_PN6 = 130, |
| 2194 | AARCH64_REG_PN7 = 131, |
| 2195 | AARCH64_REG_PN8 = 132, |
| 2196 | AARCH64_REG_PN9 = 133, |
| 2197 | AARCH64_REG_PN10 = 134, |
| 2198 | AARCH64_REG_PN11 = 135, |
| 2199 | AARCH64_REG_PN12 = 136, |
| 2200 | AARCH64_REG_PN13 = 137, |
| 2201 | AARCH64_REG_PN14 = 138, |
| 2202 | AARCH64_REG_PN15 = 139, |
| 2203 | AARCH64_REG_Q0 = 140, |
| 2204 | AARCH64_REG_Q1 = 141, |
| 2205 | AARCH64_REG_Q2 = 142, |
| 2206 | AARCH64_REG_Q3 = 143, |
| 2207 | AARCH64_REG_Q4 = 144, |
| 2208 | AARCH64_REG_Q5 = 145, |
| 2209 | AARCH64_REG_Q6 = 146, |
| 2210 | AARCH64_REG_Q7 = 147, |
| 2211 | AARCH64_REG_Q8 = 148, |
| 2212 | AARCH64_REG_Q9 = 149, |
| 2213 | AARCH64_REG_Q10 = 150, |
| 2214 | AARCH64_REG_Q11 = 151, |
| 2215 | AARCH64_REG_Q12 = 152, |
| 2216 | AARCH64_REG_Q13 = 153, |
| 2217 | AARCH64_REG_Q14 = 154, |
| 2218 | AARCH64_REG_Q15 = 155, |
| 2219 | AARCH64_REG_Q16 = 156, |
| 2220 | AARCH64_REG_Q17 = 157, |
| 2221 | AARCH64_REG_Q18 = 158, |
| 2222 | AARCH64_REG_Q19 = 159, |
| 2223 | AARCH64_REG_Q20 = 160, |
| 2224 | AARCH64_REG_Q21 = 161, |
| 2225 | AARCH64_REG_Q22 = 162, |
| 2226 | AARCH64_REG_Q23 = 163, |
| 2227 | AARCH64_REG_Q24 = 164, |
| 2228 | AARCH64_REG_Q25 = 165, |
| 2229 | AARCH64_REG_Q26 = 166, |
| 2230 | AARCH64_REG_Q27 = 167, |
| 2231 | AARCH64_REG_Q28 = 168, |
| 2232 | AARCH64_REG_Q29 = 169, |
| 2233 | AARCH64_REG_Q30 = 170, |
| 2234 | AARCH64_REG_Q31 = 171, |
| 2235 | AARCH64_REG_S0 = 172, |
| 2236 | AARCH64_REG_S1 = 173, |
| 2237 | AARCH64_REG_S2 = 174, |
| 2238 | AARCH64_REG_S3 = 175, |
| 2239 | AARCH64_REG_S4 = 176, |
| 2240 | AARCH64_REG_S5 = 177, |
| 2241 | AARCH64_REG_S6 = 178, |
| 2242 | AARCH64_REG_S7 = 179, |
| 2243 | AARCH64_REG_S8 = 180, |
| 2244 | AARCH64_REG_S9 = 181, |
| 2245 | AARCH64_REG_S10 = 182, |
| 2246 | AARCH64_REG_S11 = 183, |
| 2247 | AARCH64_REG_S12 = 184, |
| 2248 | AARCH64_REG_S13 = 185, |
| 2249 | AARCH64_REG_S14 = 186, |
| 2250 | AARCH64_REG_S15 = 187, |
| 2251 | AARCH64_REG_S16 = 188, |
| 2252 | AARCH64_REG_S17 = 189, |
| 2253 | AARCH64_REG_S18 = 190, |
| 2254 | AARCH64_REG_S19 = 191, |
| 2255 | AARCH64_REG_S20 = 192, |
| 2256 | AARCH64_REG_S21 = 193, |
| 2257 | AARCH64_REG_S22 = 194, |
| 2258 | AARCH64_REG_S23 = 195, |
| 2259 | AARCH64_REG_S24 = 196, |
| 2260 | AARCH64_REG_S25 = 197, |
| 2261 | AARCH64_REG_S26 = 198, |
| 2262 | AARCH64_REG_S27 = 199, |
| 2263 | AARCH64_REG_S28 = 200, |
| 2264 | AARCH64_REG_S29 = 201, |
| 2265 | AARCH64_REG_S30 = 202, |
| 2266 | AARCH64_REG_S31 = 203, |
| 2267 | AARCH64_REG_W0 = 204, |
| 2268 | AARCH64_REG_W1 = 205, |
| 2269 | AARCH64_REG_W2 = 206, |
| 2270 | AARCH64_REG_W3 = 207, |
| 2271 | AARCH64_REG_W4 = 208, |
| 2272 | AARCH64_REG_W5 = 209, |
| 2273 | AARCH64_REG_W6 = 210, |
| 2274 | AARCH64_REG_W7 = 211, |
| 2275 | AARCH64_REG_W8 = 212, |
| 2276 | AARCH64_REG_W9 = 213, |
| 2277 | AARCH64_REG_W10 = 214, |
| 2278 | AARCH64_REG_W11 = 215, |
| 2279 | AARCH64_REG_W12 = 216, |
| 2280 | AARCH64_REG_W13 = 217, |
| 2281 | AARCH64_REG_W14 = 218, |
| 2282 | AARCH64_REG_W15 = 219, |
| 2283 | AARCH64_REG_W16 = 220, |
| 2284 | AARCH64_REG_W17 = 221, |
| 2285 | AARCH64_REG_W18 = 222, |
| 2286 | AARCH64_REG_W19 = 223, |
| 2287 | AARCH64_REG_W20 = 224, |
| 2288 | AARCH64_REG_W21 = 225, |
| 2289 | AARCH64_REG_W22 = 226, |
| 2290 | AARCH64_REG_W23 = 227, |
| 2291 | AARCH64_REG_W24 = 228, |
| 2292 | AARCH64_REG_W25 = 229, |
| 2293 | AARCH64_REG_W26 = 230, |
| 2294 | AARCH64_REG_W27 = 231, |
| 2295 | AARCH64_REG_W28 = 232, |
| 2296 | AARCH64_REG_W29 = 233, |
| 2297 | AARCH64_REG_W30 = 234, |
| 2298 | AARCH64_REG_X0 = 235, |
| 2299 | AARCH64_REG_X1 = 236, |
| 2300 | AARCH64_REG_X2 = 237, |
| 2301 | AARCH64_REG_X3 = 238, |
| 2302 | AARCH64_REG_X4 = 239, |
| 2303 | AARCH64_REG_X5 = 240, |
| 2304 | AARCH64_REG_X6 = 241, |
| 2305 | AARCH64_REG_X7 = 242, |
| 2306 | AARCH64_REG_X8 = 243, |
| 2307 | AARCH64_REG_X9 = 244, |
| 2308 | AARCH64_REG_X10 = 245, |
| 2309 | AARCH64_REG_X11 = 246, |
| 2310 | AARCH64_REG_X12 = 247, |
| 2311 | AARCH64_REG_X13 = 248, |
| 2312 | AARCH64_REG_X14 = 249, |
| 2313 | AARCH64_REG_X15 = 250, |
| 2314 | AARCH64_REG_X16 = 251, |
| 2315 | AARCH64_REG_X17 = 252, |
| 2316 | AARCH64_REG_X18 = 253, |
| 2317 | AARCH64_REG_X19 = 254, |
| 2318 | AARCH64_REG_X20 = 255, |
| 2319 | AARCH64_REG_X21 = 256, |
| 2320 | AARCH64_REG_X22 = 257, |
| 2321 | AARCH64_REG_X23 = 258, |
| 2322 | AARCH64_REG_X24 = 259, |
| 2323 | AARCH64_REG_X25 = 260, |
| 2324 | AARCH64_REG_X26 = 261, |
| 2325 | AARCH64_REG_X27 = 262, |
| 2326 | AARCH64_REG_X28 = 263, |
| 2327 | AARCH64_REG_Z0 = 264, |
| 2328 | AARCH64_REG_Z1 = 265, |
| 2329 | AARCH64_REG_Z2 = 266, |
| 2330 | AARCH64_REG_Z3 = 267, |
| 2331 | AARCH64_REG_Z4 = 268, |
| 2332 | AARCH64_REG_Z5 = 269, |
| 2333 | AARCH64_REG_Z6 = 270, |
| 2334 | AARCH64_REG_Z7 = 271, |
| 2335 | AARCH64_REG_Z8 = 272, |
| 2336 | AARCH64_REG_Z9 = 273, |
| 2337 | AARCH64_REG_Z10 = 274, |
| 2338 | AARCH64_REG_Z11 = 275, |
| 2339 | AARCH64_REG_Z12 = 276, |
| 2340 | AARCH64_REG_Z13 = 277, |
| 2341 | AARCH64_REG_Z14 = 278, |
| 2342 | AARCH64_REG_Z15 = 279, |
| 2343 | AARCH64_REG_Z16 = 280, |
| 2344 | AARCH64_REG_Z17 = 281, |
| 2345 | AARCH64_REG_Z18 = 282, |
| 2346 | AARCH64_REG_Z19 = 283, |
| 2347 | AARCH64_REG_Z20 = 284, |
| 2348 | AARCH64_REG_Z21 = 285, |
| 2349 | AARCH64_REG_Z22 = 286, |
| 2350 | AARCH64_REG_Z23 = 287, |
| 2351 | AARCH64_REG_Z24 = 288, |
| 2352 | AARCH64_REG_Z25 = 289, |
| 2353 | AARCH64_REG_Z26 = 290, |
| 2354 | AARCH64_REG_Z27 = 291, |
| 2355 | AARCH64_REG_Z28 = 292, |
| 2356 | AARCH64_REG_Z29 = 293, |
| 2357 | AARCH64_REG_Z30 = 294, |
| 2358 | AARCH64_REG_Z31 = 295, |
| 2359 | AARCH64_REG_ZAB0 = 296, |
| 2360 | AARCH64_REG_ZAD0 = 297, |
| 2361 | AARCH64_REG_ZAD1 = 298, |
| 2362 | AARCH64_REG_ZAD2 = 299, |
| 2363 | AARCH64_REG_ZAD3 = 300, |
| 2364 | AARCH64_REG_ZAD4 = 301, |
| 2365 | AARCH64_REG_ZAD5 = 302, |
| 2366 | AARCH64_REG_ZAD6 = 303, |
| 2367 | AARCH64_REG_ZAD7 = 304, |
| 2368 | AARCH64_REG_ZAH0 = 305, |
| 2369 | AARCH64_REG_ZAH1 = 306, |
| 2370 | AARCH64_REG_ZAQ0 = 307, |
| 2371 | AARCH64_REG_ZAQ1 = 308, |
| 2372 | AARCH64_REG_ZAQ2 = 309, |
| 2373 | AARCH64_REG_ZAQ3 = 310, |
| 2374 | AARCH64_REG_ZAQ4 = 311, |
| 2375 | AARCH64_REG_ZAQ5 = 312, |
| 2376 | AARCH64_REG_ZAQ6 = 313, |
| 2377 | AARCH64_REG_ZAQ7 = 314, |
| 2378 | AARCH64_REG_ZAQ8 = 315, |
| 2379 | AARCH64_REG_ZAQ9 = 316, |
| 2380 | AARCH64_REG_ZAQ10 = 317, |
| 2381 | AARCH64_REG_ZAQ11 = 318, |
| 2382 | AARCH64_REG_ZAQ12 = 319, |
| 2383 | AARCH64_REG_ZAQ13 = 320, |
| 2384 | AARCH64_REG_ZAQ14 = 321, |
| 2385 | AARCH64_REG_ZAQ15 = 322, |
| 2386 | AARCH64_REG_ZAS0 = 323, |
| 2387 | AARCH64_REG_ZAS1 = 324, |
| 2388 | AARCH64_REG_ZAS2 = 325, |
| 2389 | AARCH64_REG_ZAS3 = 326, |
| 2390 | AARCH64_REG_ZT0 = 327, |
| 2391 | AARCH64_REG_D0_D1 = 328, |
| 2392 | AARCH64_REG_D1_D2 = 329, |
| 2393 | AARCH64_REG_D2_D3 = 330, |
| 2394 | AARCH64_REG_D3_D4 = 331, |
| 2395 | AARCH64_REG_D4_D5 = 332, |
| 2396 | AARCH64_REG_D5_D6 = 333, |
| 2397 | AARCH64_REG_D6_D7 = 334, |
| 2398 | AARCH64_REG_D7_D8 = 335, |
| 2399 | AARCH64_REG_D8_D9 = 336, |
| 2400 | AARCH64_REG_D9_D10 = 337, |
| 2401 | AARCH64_REG_D10_D11 = 338, |
| 2402 | AARCH64_REG_D11_D12 = 339, |
| 2403 | AARCH64_REG_D12_D13 = 340, |
| 2404 | AARCH64_REG_D13_D14 = 341, |
| 2405 | AARCH64_REG_D14_D15 = 342, |
| 2406 | AARCH64_REG_D15_D16 = 343, |
| 2407 | AARCH64_REG_D16_D17 = 344, |
| 2408 | AARCH64_REG_D17_D18 = 345, |
| 2409 | AARCH64_REG_D18_D19 = 346, |
| 2410 | AARCH64_REG_D19_D20 = 347, |
| 2411 | AARCH64_REG_D20_D21 = 348, |
| 2412 | AARCH64_REG_D21_D22 = 349, |
| 2413 | AARCH64_REG_D22_D23 = 350, |
| 2414 | AARCH64_REG_D23_D24 = 351, |
| 2415 | AARCH64_REG_D24_D25 = 352, |
| 2416 | AARCH64_REG_D25_D26 = 353, |
| 2417 | AARCH64_REG_D26_D27 = 354, |
| 2418 | AARCH64_REG_D27_D28 = 355, |
| 2419 | AARCH64_REG_D28_D29 = 356, |
| 2420 | AARCH64_REG_D29_D30 = 357, |
| 2421 | AARCH64_REG_D30_D31 = 358, |
| 2422 | AARCH64_REG_D31_D0 = 359, |
| 2423 | AARCH64_REG_D0_D1_D2_D3 = 360, |
| 2424 | AARCH64_REG_D1_D2_D3_D4 = 361, |
| 2425 | AARCH64_REG_D2_D3_D4_D5 = 362, |
| 2426 | AARCH64_REG_D3_D4_D5_D6 = 363, |
| 2427 | AARCH64_REG_D4_D5_D6_D7 = 364, |
| 2428 | AARCH64_REG_D5_D6_D7_D8 = 365, |
| 2429 | AARCH64_REG_D6_D7_D8_D9 = 366, |
| 2430 | AARCH64_REG_D7_D8_D9_D10 = 367, |
| 2431 | AARCH64_REG_D8_D9_D10_D11 = 368, |
| 2432 | AARCH64_REG_D9_D10_D11_D12 = 369, |
| 2433 | AARCH64_REG_D10_D11_D12_D13 = 370, |
| 2434 | AARCH64_REG_D11_D12_D13_D14 = 371, |
| 2435 | AARCH64_REG_D12_D13_D14_D15 = 372, |
| 2436 | AARCH64_REG_D13_D14_D15_D16 = 373, |
| 2437 | AARCH64_REG_D14_D15_D16_D17 = 374, |
| 2438 | AARCH64_REG_D15_D16_D17_D18 = 375, |
| 2439 | AARCH64_REG_D16_D17_D18_D19 = 376, |
| 2440 | AARCH64_REG_D17_D18_D19_D20 = 377, |
| 2441 | AARCH64_REG_D18_D19_D20_D21 = 378, |
| 2442 | AARCH64_REG_D19_D20_D21_D22 = 379, |
| 2443 | AARCH64_REG_D20_D21_D22_D23 = 380, |
| 2444 | AARCH64_REG_D21_D22_D23_D24 = 381, |
| 2445 | AARCH64_REG_D22_D23_D24_D25 = 382, |
| 2446 | AARCH64_REG_D23_D24_D25_D26 = 383, |
| 2447 | AARCH64_REG_D24_D25_D26_D27 = 384, |
| 2448 | AARCH64_REG_D25_D26_D27_D28 = 385, |
| 2449 | AARCH64_REG_D26_D27_D28_D29 = 386, |
| 2450 | AARCH64_REG_D27_D28_D29_D30 = 387, |
| 2451 | AARCH64_REG_D28_D29_D30_D31 = 388, |
| 2452 | AARCH64_REG_D29_D30_D31_D0 = 389, |
| 2453 | AARCH64_REG_D30_D31_D0_D1 = 390, |
| 2454 | AARCH64_REG_D31_D0_D1_D2 = 391, |
| 2455 | AARCH64_REG_D0_D1_D2 = 392, |
| 2456 | AARCH64_REG_D1_D2_D3 = 393, |
| 2457 | AARCH64_REG_D2_D3_D4 = 394, |
| 2458 | AARCH64_REG_D3_D4_D5 = 395, |
| 2459 | AARCH64_REG_D4_D5_D6 = 396, |
| 2460 | AARCH64_REG_D5_D6_D7 = 397, |
| 2461 | AARCH64_REG_D6_D7_D8 = 398, |
| 2462 | AARCH64_REG_D7_D8_D9 = 399, |
| 2463 | AARCH64_REG_D8_D9_D10 = 400, |
| 2464 | AARCH64_REG_D9_D10_D11 = 401, |
| 2465 | AARCH64_REG_D10_D11_D12 = 402, |
| 2466 | AARCH64_REG_D11_D12_D13 = 403, |
| 2467 | AARCH64_REG_D12_D13_D14 = 404, |
| 2468 | AARCH64_REG_D13_D14_D15 = 405, |
| 2469 | AARCH64_REG_D14_D15_D16 = 406, |
| 2470 | AARCH64_REG_D15_D16_D17 = 407, |
| 2471 | AARCH64_REG_D16_D17_D18 = 408, |
| 2472 | AARCH64_REG_D17_D18_D19 = 409, |
| 2473 | AARCH64_REG_D18_D19_D20 = 410, |
| 2474 | AARCH64_REG_D19_D20_D21 = 411, |
| 2475 | AARCH64_REG_D20_D21_D22 = 412, |
| 2476 | AARCH64_REG_D21_D22_D23 = 413, |
| 2477 | AARCH64_REG_D22_D23_D24 = 414, |
| 2478 | AARCH64_REG_D23_D24_D25 = 415, |
| 2479 | AARCH64_REG_D24_D25_D26 = 416, |
| 2480 | AARCH64_REG_D25_D26_D27 = 417, |
| 2481 | AARCH64_REG_D26_D27_D28 = 418, |
| 2482 | AARCH64_REG_D27_D28_D29 = 419, |
| 2483 | AARCH64_REG_D28_D29_D30 = 420, |
| 2484 | AARCH64_REG_D29_D30_D31 = 421, |
| 2485 | AARCH64_REG_D30_D31_D0 = 422, |
| 2486 | AARCH64_REG_D31_D0_D1 = 423, |
| 2487 | AARCH64_REG_P0_P1 = 424, |
| 2488 | AARCH64_REG_P1_P2 = 425, |
| 2489 | AARCH64_REG_P2_P3 = 426, |
| 2490 | AARCH64_REG_P3_P4 = 427, |
| 2491 | AARCH64_REG_P4_P5 = 428, |
| 2492 | AARCH64_REG_P5_P6 = 429, |
| 2493 | AARCH64_REG_P6_P7 = 430, |
| 2494 | AARCH64_REG_P7_P8 = 431, |
| 2495 | AARCH64_REG_P8_P9 = 432, |
| 2496 | AARCH64_REG_P9_P10 = 433, |
| 2497 | AARCH64_REG_P10_P11 = 434, |
| 2498 | AARCH64_REG_P11_P12 = 435, |
| 2499 | AARCH64_REG_P12_P13 = 436, |
| 2500 | AARCH64_REG_P13_P14 = 437, |
| 2501 | AARCH64_REG_P14_P15 = 438, |
| 2502 | AARCH64_REG_P15_P0 = 439, |
| 2503 | AARCH64_REG_Q0_Q1 = 440, |
| 2504 | AARCH64_REG_Q1_Q2 = 441, |
| 2505 | AARCH64_REG_Q2_Q3 = 442, |
| 2506 | AARCH64_REG_Q3_Q4 = 443, |
| 2507 | AARCH64_REG_Q4_Q5 = 444, |
| 2508 | AARCH64_REG_Q5_Q6 = 445, |
| 2509 | AARCH64_REG_Q6_Q7 = 446, |
| 2510 | AARCH64_REG_Q7_Q8 = 447, |
| 2511 | AARCH64_REG_Q8_Q9 = 448, |
| 2512 | AARCH64_REG_Q9_Q10 = 449, |
| 2513 | AARCH64_REG_Q10_Q11 = 450, |
| 2514 | AARCH64_REG_Q11_Q12 = 451, |
| 2515 | AARCH64_REG_Q12_Q13 = 452, |
| 2516 | AARCH64_REG_Q13_Q14 = 453, |
| 2517 | AARCH64_REG_Q14_Q15 = 454, |
| 2518 | AARCH64_REG_Q15_Q16 = 455, |
| 2519 | AARCH64_REG_Q16_Q17 = 456, |
| 2520 | AARCH64_REG_Q17_Q18 = 457, |
| 2521 | AARCH64_REG_Q18_Q19 = 458, |
| 2522 | AARCH64_REG_Q19_Q20 = 459, |
| 2523 | AARCH64_REG_Q20_Q21 = 460, |
| 2524 | AARCH64_REG_Q21_Q22 = 461, |
| 2525 | AARCH64_REG_Q22_Q23 = 462, |
| 2526 | AARCH64_REG_Q23_Q24 = 463, |
| 2527 | AARCH64_REG_Q24_Q25 = 464, |
| 2528 | AARCH64_REG_Q25_Q26 = 465, |
| 2529 | AARCH64_REG_Q26_Q27 = 466, |
| 2530 | AARCH64_REG_Q27_Q28 = 467, |
| 2531 | AARCH64_REG_Q28_Q29 = 468, |
| 2532 | AARCH64_REG_Q29_Q30 = 469, |
| 2533 | AARCH64_REG_Q30_Q31 = 470, |
| 2534 | AARCH64_REG_Q31_Q0 = 471, |
| 2535 | AARCH64_REG_Q0_Q1_Q2_Q3 = 472, |
| 2536 | AARCH64_REG_Q1_Q2_Q3_Q4 = 473, |
| 2537 | AARCH64_REG_Q2_Q3_Q4_Q5 = 474, |
| 2538 | AARCH64_REG_Q3_Q4_Q5_Q6 = 475, |
| 2539 | AARCH64_REG_Q4_Q5_Q6_Q7 = 476, |
| 2540 | AARCH64_REG_Q5_Q6_Q7_Q8 = 477, |
| 2541 | AARCH64_REG_Q6_Q7_Q8_Q9 = 478, |
| 2542 | AARCH64_REG_Q7_Q8_Q9_Q10 = 479, |
| 2543 | AARCH64_REG_Q8_Q9_Q10_Q11 = 480, |
| 2544 | AARCH64_REG_Q9_Q10_Q11_Q12 = 481, |
| 2545 | AARCH64_REG_Q10_Q11_Q12_Q13 = 482, |
| 2546 | AARCH64_REG_Q11_Q12_Q13_Q14 = 483, |
| 2547 | AARCH64_REG_Q12_Q13_Q14_Q15 = 484, |
| 2548 | AARCH64_REG_Q13_Q14_Q15_Q16 = 485, |
| 2549 | AARCH64_REG_Q14_Q15_Q16_Q17 = 486, |
| 2550 | AARCH64_REG_Q15_Q16_Q17_Q18 = 487, |
| 2551 | AARCH64_REG_Q16_Q17_Q18_Q19 = 488, |
| 2552 | AARCH64_REG_Q17_Q18_Q19_Q20 = 489, |
| 2553 | AARCH64_REG_Q18_Q19_Q20_Q21 = 490, |
| 2554 | AARCH64_REG_Q19_Q20_Q21_Q22 = 491, |
| 2555 | AARCH64_REG_Q20_Q21_Q22_Q23 = 492, |
| 2556 | AARCH64_REG_Q21_Q22_Q23_Q24 = 493, |
| 2557 | AARCH64_REG_Q22_Q23_Q24_Q25 = 494, |
| 2558 | AARCH64_REG_Q23_Q24_Q25_Q26 = 495, |
| 2559 | AARCH64_REG_Q24_Q25_Q26_Q27 = 496, |
| 2560 | AARCH64_REG_Q25_Q26_Q27_Q28 = 497, |
| 2561 | AARCH64_REG_Q26_Q27_Q28_Q29 = 498, |
| 2562 | AARCH64_REG_Q27_Q28_Q29_Q30 = 499, |
| 2563 | AARCH64_REG_Q28_Q29_Q30_Q31 = 500, |
| 2564 | AARCH64_REG_Q29_Q30_Q31_Q0 = 501, |
| 2565 | AARCH64_REG_Q30_Q31_Q0_Q1 = 502, |
| 2566 | AARCH64_REG_Q31_Q0_Q1_Q2 = 503, |
| 2567 | AARCH64_REG_Q0_Q1_Q2 = 504, |
| 2568 | AARCH64_REG_Q1_Q2_Q3 = 505, |
| 2569 | AARCH64_REG_Q2_Q3_Q4 = 506, |
| 2570 | AARCH64_REG_Q3_Q4_Q5 = 507, |
| 2571 | AARCH64_REG_Q4_Q5_Q6 = 508, |
| 2572 | AARCH64_REG_Q5_Q6_Q7 = 509, |
| 2573 | AARCH64_REG_Q6_Q7_Q8 = 510, |
| 2574 | AARCH64_REG_Q7_Q8_Q9 = 511, |
| 2575 | AARCH64_REG_Q8_Q9_Q10 = 512, |
| 2576 | AARCH64_REG_Q9_Q10_Q11 = 513, |
| 2577 | AARCH64_REG_Q10_Q11_Q12 = 514, |
| 2578 | AARCH64_REG_Q11_Q12_Q13 = 515, |
| 2579 | AARCH64_REG_Q12_Q13_Q14 = 516, |
| 2580 | AARCH64_REG_Q13_Q14_Q15 = 517, |
| 2581 | AARCH64_REG_Q14_Q15_Q16 = 518, |
| 2582 | AARCH64_REG_Q15_Q16_Q17 = 519, |
| 2583 | AARCH64_REG_Q16_Q17_Q18 = 520, |
| 2584 | AARCH64_REG_Q17_Q18_Q19 = 521, |
| 2585 | AARCH64_REG_Q18_Q19_Q20 = 522, |
| 2586 | AARCH64_REG_Q19_Q20_Q21 = 523, |
| 2587 | AARCH64_REG_Q20_Q21_Q22 = 524, |
| 2588 | AARCH64_REG_Q21_Q22_Q23 = 525, |
| 2589 | AARCH64_REG_Q22_Q23_Q24 = 526, |
| 2590 | AARCH64_REG_Q23_Q24_Q25 = 527, |
| 2591 | AARCH64_REG_Q24_Q25_Q26 = 528, |
| 2592 | AARCH64_REG_Q25_Q26_Q27 = 529, |
| 2593 | AARCH64_REG_Q26_Q27_Q28 = 530, |
| 2594 | AARCH64_REG_Q27_Q28_Q29 = 531, |
| 2595 | AARCH64_REG_Q28_Q29_Q30 = 532, |
| 2596 | AARCH64_REG_Q29_Q30_Q31 = 533, |
| 2597 | AARCH64_REG_Q30_Q31_Q0 = 534, |
| 2598 | AARCH64_REG_Q31_Q0_Q1 = 535, |
| 2599 | AARCH64_REG_X22_X23_X24_X25_X26_X27_X28_FP = 536, |
| 2600 | AARCH64_REG_X0_X1_X2_X3_X4_X5_X6_X7 = 537, |
| 2601 | AARCH64_REG_X2_X3_X4_X5_X6_X7_X8_X9 = 538, |
| 2602 | AARCH64_REG_X4_X5_X6_X7_X8_X9_X10_X11 = 539, |
| 2603 | AARCH64_REG_X6_X7_X8_X9_X10_X11_X12_X13 = 540, |
| 2604 | AARCH64_REG_X8_X9_X10_X11_X12_X13_X14_X15 = 541, |
| 2605 | AARCH64_REG_X10_X11_X12_X13_X14_X15_X16_X17 = 542, |
| 2606 | AARCH64_REG_X12_X13_X14_X15_X16_X17_X18_X19 = 543, |
| 2607 | AARCH64_REG_X14_X15_X16_X17_X18_X19_X20_X21 = 544, |
| 2608 | AARCH64_REG_X16_X17_X18_X19_X20_X21_X22_X23 = 545, |
| 2609 | AARCH64_REG_X18_X19_X20_X21_X22_X23_X24_X25 = 546, |
| 2610 | AARCH64_REG_X20_X21_X22_X23_X24_X25_X26_X27 = 547, |
| 2611 | AARCH64_REG_W30_WZR = 548, |
| 2612 | AARCH64_REG_W0_W1 = 549, |
| 2613 | AARCH64_REG_W2_W3 = 550, |
| 2614 | AARCH64_REG_W4_W5 = 551, |
| 2615 | AARCH64_REG_W6_W7 = 552, |
| 2616 | AARCH64_REG_W8_W9 = 553, |
| 2617 | AARCH64_REG_W10_W11 = 554, |
| 2618 | AARCH64_REG_W12_W13 = 555, |
| 2619 | AARCH64_REG_W14_W15 = 556, |
| 2620 | AARCH64_REG_W16_W17 = 557, |
| 2621 | AARCH64_REG_W18_W19 = 558, |
| 2622 | AARCH64_REG_W20_W21 = 559, |
| 2623 | AARCH64_REG_W22_W23 = 560, |
| 2624 | AARCH64_REG_W24_W25 = 561, |
| 2625 | AARCH64_REG_W26_W27 = 562, |
| 2626 | AARCH64_REG_W28_W29 = 563, |
| 2627 | AARCH64_REG_LR_XZR = 564, |
| 2628 | AARCH64_REG_X28_FP = 565, |
| 2629 | AARCH64_REG_X0_X1 = 566, |
| 2630 | AARCH64_REG_X2_X3 = 567, |
| 2631 | AARCH64_REG_X4_X5 = 568, |
| 2632 | AARCH64_REG_X6_X7 = 569, |
| 2633 | AARCH64_REG_X8_X9 = 570, |
| 2634 | AARCH64_REG_X10_X11 = 571, |
| 2635 | AARCH64_REG_X12_X13 = 572, |
| 2636 | AARCH64_REG_X14_X15 = 573, |
| 2637 | AARCH64_REG_X16_X17 = 574, |
| 2638 | AARCH64_REG_X18_X19 = 575, |
| 2639 | AARCH64_REG_X20_X21 = 576, |
| 2640 | AARCH64_REG_X22_X23 = 577, |
| 2641 | AARCH64_REG_X24_X25 = 578, |
| 2642 | AARCH64_REG_X26_X27 = 579, |
| 2643 | AARCH64_REG_Z0_Z1 = 580, |
| 2644 | AARCH64_REG_Z1_Z2 = 581, |
| 2645 | AARCH64_REG_Z2_Z3 = 582, |
| 2646 | AARCH64_REG_Z3_Z4 = 583, |
| 2647 | AARCH64_REG_Z4_Z5 = 584, |
| 2648 | AARCH64_REG_Z5_Z6 = 585, |
| 2649 | AARCH64_REG_Z6_Z7 = 586, |
| 2650 | AARCH64_REG_Z7_Z8 = 587, |
| 2651 | AARCH64_REG_Z8_Z9 = 588, |
| 2652 | AARCH64_REG_Z9_Z10 = 589, |
| 2653 | AARCH64_REG_Z10_Z11 = 590, |
| 2654 | AARCH64_REG_Z11_Z12 = 591, |
| 2655 | AARCH64_REG_Z12_Z13 = 592, |
| 2656 | AARCH64_REG_Z13_Z14 = 593, |
| 2657 | AARCH64_REG_Z14_Z15 = 594, |
| 2658 | AARCH64_REG_Z15_Z16 = 595, |
| 2659 | AARCH64_REG_Z16_Z17 = 596, |
| 2660 | AARCH64_REG_Z17_Z18 = 597, |
| 2661 | AARCH64_REG_Z18_Z19 = 598, |
| 2662 | AARCH64_REG_Z19_Z20 = 599, |
| 2663 | AARCH64_REG_Z20_Z21 = 600, |
| 2664 | AARCH64_REG_Z21_Z22 = 601, |
| 2665 | AARCH64_REG_Z22_Z23 = 602, |
| 2666 | AARCH64_REG_Z23_Z24 = 603, |
| 2667 | AARCH64_REG_Z24_Z25 = 604, |
| 2668 | AARCH64_REG_Z25_Z26 = 605, |
| 2669 | AARCH64_REG_Z26_Z27 = 606, |
| 2670 | AARCH64_REG_Z27_Z28 = 607, |
| 2671 | AARCH64_REG_Z28_Z29 = 608, |
| 2672 | AARCH64_REG_Z29_Z30 = 609, |
| 2673 | AARCH64_REG_Z30_Z31 = 610, |
| 2674 | AARCH64_REG_Z31_Z0 = 611, |
| 2675 | AARCH64_REG_Z0_Z1_Z2_Z3 = 612, |
| 2676 | AARCH64_REG_Z1_Z2_Z3_Z4 = 613, |
| 2677 | AARCH64_REG_Z2_Z3_Z4_Z5 = 614, |
| 2678 | AARCH64_REG_Z3_Z4_Z5_Z6 = 615, |
| 2679 | AARCH64_REG_Z4_Z5_Z6_Z7 = 616, |
| 2680 | AARCH64_REG_Z5_Z6_Z7_Z8 = 617, |
| 2681 | AARCH64_REG_Z6_Z7_Z8_Z9 = 618, |
| 2682 | AARCH64_REG_Z7_Z8_Z9_Z10 = 619, |
| 2683 | AARCH64_REG_Z8_Z9_Z10_Z11 = 620, |
| 2684 | AARCH64_REG_Z9_Z10_Z11_Z12 = 621, |
| 2685 | AARCH64_REG_Z10_Z11_Z12_Z13 = 622, |
| 2686 | AARCH64_REG_Z11_Z12_Z13_Z14 = 623, |
| 2687 | AARCH64_REG_Z12_Z13_Z14_Z15 = 624, |
| 2688 | AARCH64_REG_Z13_Z14_Z15_Z16 = 625, |
| 2689 | AARCH64_REG_Z14_Z15_Z16_Z17 = 626, |
| 2690 | AARCH64_REG_Z15_Z16_Z17_Z18 = 627, |
| 2691 | AARCH64_REG_Z16_Z17_Z18_Z19 = 628, |
| 2692 | AARCH64_REG_Z17_Z18_Z19_Z20 = 629, |
| 2693 | AARCH64_REG_Z18_Z19_Z20_Z21 = 630, |
| 2694 | AARCH64_REG_Z19_Z20_Z21_Z22 = 631, |
| 2695 | AARCH64_REG_Z20_Z21_Z22_Z23 = 632, |
| 2696 | AARCH64_REG_Z21_Z22_Z23_Z24 = 633, |
| 2697 | AARCH64_REG_Z22_Z23_Z24_Z25 = 634, |
| 2698 | AARCH64_REG_Z23_Z24_Z25_Z26 = 635, |
| 2699 | AARCH64_REG_Z24_Z25_Z26_Z27 = 636, |
| 2700 | AARCH64_REG_Z25_Z26_Z27_Z28 = 637, |
| 2701 | AARCH64_REG_Z26_Z27_Z28_Z29 = 638, |
| 2702 | AARCH64_REG_Z27_Z28_Z29_Z30 = 639, |
| 2703 | AARCH64_REG_Z28_Z29_Z30_Z31 = 640, |
| 2704 | AARCH64_REG_Z29_Z30_Z31_Z0 = 641, |
| 2705 | AARCH64_REG_Z30_Z31_Z0_Z1 = 642, |
| 2706 | AARCH64_REG_Z31_Z0_Z1_Z2 = 643, |
| 2707 | AARCH64_REG_Z0_Z1_Z2 = 644, |
| 2708 | AARCH64_REG_Z1_Z2_Z3 = 645, |
| 2709 | AARCH64_REG_Z2_Z3_Z4 = 646, |
| 2710 | AARCH64_REG_Z3_Z4_Z5 = 647, |
| 2711 | AARCH64_REG_Z4_Z5_Z6 = 648, |
| 2712 | AARCH64_REG_Z5_Z6_Z7 = 649, |
| 2713 | AARCH64_REG_Z6_Z7_Z8 = 650, |
| 2714 | AARCH64_REG_Z7_Z8_Z9 = 651, |
| 2715 | AARCH64_REG_Z8_Z9_Z10 = 652, |
| 2716 | AARCH64_REG_Z9_Z10_Z11 = 653, |
| 2717 | AARCH64_REG_Z10_Z11_Z12 = 654, |
| 2718 | AARCH64_REG_Z11_Z12_Z13 = 655, |
| 2719 | AARCH64_REG_Z12_Z13_Z14 = 656, |
| 2720 | AARCH64_REG_Z13_Z14_Z15 = 657, |
| 2721 | AARCH64_REG_Z14_Z15_Z16 = 658, |
| 2722 | AARCH64_REG_Z15_Z16_Z17 = 659, |
| 2723 | AARCH64_REG_Z16_Z17_Z18 = 660, |
| 2724 | AARCH64_REG_Z17_Z18_Z19 = 661, |
| 2725 | AARCH64_REG_Z18_Z19_Z20 = 662, |
| 2726 | AARCH64_REG_Z19_Z20_Z21 = 663, |
| 2727 | AARCH64_REG_Z20_Z21_Z22 = 664, |
| 2728 | AARCH64_REG_Z21_Z22_Z23 = 665, |
| 2729 | AARCH64_REG_Z22_Z23_Z24 = 666, |
| 2730 | AARCH64_REG_Z23_Z24_Z25 = 667, |
| 2731 | AARCH64_REG_Z24_Z25_Z26 = 668, |
| 2732 | AARCH64_REG_Z25_Z26_Z27 = 669, |
| 2733 | AARCH64_REG_Z26_Z27_Z28 = 670, |
| 2734 | AARCH64_REG_Z27_Z28_Z29 = 671, |
| 2735 | AARCH64_REG_Z28_Z29_Z30 = 672, |
| 2736 | AARCH64_REG_Z29_Z30_Z31 = 673, |
| 2737 | AARCH64_REG_Z30_Z31_Z0 = 674, |
| 2738 | AARCH64_REG_Z31_Z0_Z1 = 675, |
| 2739 | AARCH64_REG_Z16_Z24 = 676, |
| 2740 | AARCH64_REG_Z17_Z25 = 677, |
| 2741 | AARCH64_REG_Z18_Z26 = 678, |
| 2742 | AARCH64_REG_Z19_Z27 = 679, |
| 2743 | AARCH64_REG_Z20_Z28 = 680, |
| 2744 | AARCH64_REG_Z21_Z29 = 681, |
| 2745 | AARCH64_REG_Z22_Z30 = 682, |
| 2746 | AARCH64_REG_Z23_Z31 = 683, |
| 2747 | AARCH64_REG_Z0_Z8 = 684, |
| 2748 | AARCH64_REG_Z1_Z9 = 685, |
| 2749 | AARCH64_REG_Z2_Z10 = 686, |
| 2750 | AARCH64_REG_Z3_Z11 = 687, |
| 2751 | AARCH64_REG_Z4_Z12 = 688, |
| 2752 | AARCH64_REG_Z5_Z13 = 689, |
| 2753 | AARCH64_REG_Z6_Z14 = 690, |
| 2754 | AARCH64_REG_Z7_Z15 = 691, |
| 2755 | AARCH64_REG_Z16_Z20_Z24_Z28 = 692, |
| 2756 | AARCH64_REG_Z17_Z21_Z25_Z29 = 693, |
| 2757 | AARCH64_REG_Z18_Z22_Z26_Z30 = 694, |
| 2758 | AARCH64_REG_Z19_Z23_Z27_Z31 = 695, |
| 2759 | AARCH64_REG_Z0_Z4_Z8_Z12 = 696, |
| 2760 | AARCH64_REG_Z1_Z5_Z9_Z13 = 697, |
| 2761 | AARCH64_REG_Z2_Z6_Z10_Z14 = 698, |
| 2762 | AARCH64_REG_Z3_Z7_Z11_Z15 = 699, |
| 2763 | AARCH64_REG_ENDING, // 700 |
| 2764 | |
| 2765 | // clang-format on |
| 2766 | // generated content <AArch64GenCSRegEnum.inc> end |
| 2767 | |
| 2768 | // alias registers |
| 2769 | AARCH64_REG_IP0 = AARCH64_REG_X16, |
| 2770 | AARCH64_REG_IP1 = AARCH64_REG_X17, |
| 2771 | AARCH64_REG_X29 = AARCH64_REG_FP, |
| 2772 | AARCH64_REG_X30 = AARCH64_REG_LR, |
| 2773 | } aarch64_reg; |
| 2774 | |
| 2775 | /// Instruction's operand referring to memory |
| 2776 | typedef struct aarch64_op_mem { |
| 2777 | aarch64_reg base; ///< base register |
| 2778 | aarch64_reg index; ///< index register |
| 2779 | int32_t disp; ///< displacement/offset value |
| 2780 | } aarch64_op_mem; |
| 2781 | |
| 2782 | typedef enum { |
| 2783 | AARCH64_SME_OP_INVALID, |
| 2784 | AARCH64_SME_OP_TILE, ///< SME operand is a single tile. |
| 2785 | AARCH64_SME_OP_TILE_VEC, ///< SME operand is a tile indexed by a register and/or immediate |
| 2786 | } aarch64_sme_op_type; |
| 2787 | |
| 2788 | #define AARCH64_SLICE_IMM_INVALID UINT16_MAX |
| 2789 | #define AARCH64_SLICE_IMM_RANGE_INVALID UINT8_MAX |
| 2790 | |
| 2791 | typedef struct { |
| 2792 | uint8_t first; |
| 2793 | uint8_t offset; |
| 2794 | } aarch64_imm_range; |
| 2795 | |
| 2796 | /// SME Instruction's matrix operand |
| 2797 | typedef struct { |
| 2798 | aarch64_sme_op_type type; ///< AArch64_SME_OP_TILE, AArch64_SME_OP_TILE_VEC |
| 2799 | aarch64_reg tile; ///< Matrix tile register |
| 2800 | aarch64_reg slice_reg; ///< slice index reg |
| 2801 | union { |
| 2802 | uint16_t imm; ///< Invalid if equal to AARCH64_SLICE_IMM_INVALID |
| 2803 | aarch64_imm_range imm_range; ///< Members are set to AARCH64_SLICE_IMM_RANGE_INVALID if invalid. |
| 2804 | } slice_offset; ///< slice index offset. |
| 2805 | bool has_range_offset; ///< If true, the offset is a range. |
| 2806 | bool is_vertical; ///< Flag if slice is vertical or horizontal |
| 2807 | } aarch64_op_sme; |
| 2808 | |
| 2809 | /// SME Instruction's operand has index |
| 2810 | typedef struct { |
| 2811 | aarch64_reg reg; ///< Vector predicate register |
| 2812 | aarch64_reg vec_select; ///< Vector select register. |
| 2813 | int32_t imm_index; ///< Index in range 0 to one less of vector elements in a 128bit reg. |
| 2814 | } aarch64_op_pred; |
| 2815 | |
| 2816 | /// Instruction operand |
| 2817 | typedef struct cs_aarch64_op { |
| 2818 | int vector_index; ///< Vector Index for some vector operands (or -1 if |
| 2819 | ///< irrelevant) |
| 2820 | AArch64Layout_VectorLayout vas; ///< Vector Arrangement Specifier |
| 2821 | struct { |
| 2822 | aarch64_shifter type; ///< shifter type of this operand |
| 2823 | /// Shift value of this operand. |
| 2824 | /// If the type indicates a shift with a register this value should be |
| 2825 | /// interpreted as aarch64_reg. |
| 2826 | unsigned int value; |
| 2827 | } shift; |
| 2828 | aarch64_extender ext; ///< extender type of this operand |
| 2829 | aarch64_op_type type; ///< operand type |
| 2830 | /// Q and V regs share the same identifiers (because they are the same registers). |
| 2831 | /// If this flag is set, the register operand is interpreted as a V-register. |
| 2832 | bool is_vreg; |
| 2833 | union { |
| 2834 | aarch64_reg reg; ///< register value for REG operand |
| 2835 | int64_t imm; ///< immediate value, or index for C-IMM or IMM operand |
| 2836 | aarch64_imm_range imm_range; ///< An immediate range |
| 2837 | double fp; ///< floating point value for FP operand |
| 2838 | aarch64_op_mem mem; ///< base/index/scale/disp value for MEM operand |
| 2839 | aarch64_op_sme sme; ///< SME matrix operand |
| 2840 | aarch64_op_pred pred; ///< Predicate register |
| 2841 | }; |
| 2842 | aarch64_sysop sysop; ///< System operand |
| 2843 | |
| 2844 | /// How is this operand accessed? (READ, WRITE or READ|WRITE) |
| 2845 | /// This field is combined of cs_ac_type. |
| 2846 | /// NOTE: this field is irrelevant if engine is compiled in DIET mode. |
| 2847 | uint8_t access; |
| 2848 | bool is_list_member; ///< True if this operand is part of a register or vector list. |
| 2849 | } cs_aarch64_op; |
| 2850 | |
| 2851 | typedef struct { |
| 2852 | cs_ac_type mem_acc; ///< CGI memory access according to mayLoad and mayStore |
| 2853 | } aarch64_suppl_info; |
| 2854 | |
| 2855 | #define NUM_AARCH64_OPS 16 |
| 2856 | |
| 2857 | /// Instruction structure |
| 2858 | typedef struct cs_aarch64 { |
| 2859 | AArch64CC_CondCode cc; ///< conditional code for this insn |
| 2860 | bool update_flags; ///< does this insn update flags? |
| 2861 | bool post_index; ///< only set if writeback is 'True', if 'False' pre-index, otherwise post. |
| 2862 | bool is_doing_sme; ///< True if a SME or SVE operand is currently edited. |
| 2863 | |
| 2864 | /// Number of operands of this instruction, |
| 2865 | /// or 0 when instruction has no operand. |
| 2866 | uint8_t op_count; |
| 2867 | |
| 2868 | cs_aarch64_op operands[NUM_AARCH64_OPS]; ///< operands for this instruction. |
| 2869 | } cs_aarch64; |
| 2870 | |
| 2871 | /// AArch64 instruction |
| 2872 | typedef enum aarch64_insn { |
| 2873 | // generated content <AArch64GenCSInsnEnum.inc> begin |
| 2874 | // clang-format off |
| 2875 | |
| 2876 | AARCH64_INS_INVALID, |
| 2877 | AARCH64_INS_ABS, |
| 2878 | AARCH64_INS_ADCLB, |
| 2879 | AARCH64_INS_ADCLT, |
| 2880 | AARCH64_INS_ADCS, |
| 2881 | AARCH64_INS_ADC, |
| 2882 | AARCH64_INS_ADDG, |
| 2883 | AARCH64_INS_ADDHA, |
| 2884 | AARCH64_INS_ADDHNB, |
| 2885 | AARCH64_INS_ADDHNT, |
| 2886 | AARCH64_INS_ADDHN, |
| 2887 | AARCH64_INS_ADDHN2, |
| 2888 | AARCH64_INS_ADDPL, |
| 2889 | AARCH64_INS_ADDPT, |
| 2890 | AARCH64_INS_ADDP, |
| 2891 | AARCH64_INS_ADDQV, |
| 2892 | AARCH64_INS_ADDSPL, |
| 2893 | AARCH64_INS_ADDSVL, |
| 2894 | AARCH64_INS_ADDS, |
| 2895 | AARCH64_INS_ADDVA, |
| 2896 | AARCH64_INS_ADDVL, |
| 2897 | AARCH64_INS_ADDV, |
| 2898 | AARCH64_INS_ADD, |
| 2899 | AARCH64_INS_ADR, |
| 2900 | AARCH64_INS_ADRP, |
| 2901 | AARCH64_INS_AESD, |
| 2902 | AARCH64_INS_AESE, |
| 2903 | AARCH64_INS_AESIMC, |
| 2904 | AARCH64_INS_AESMC, |
| 2905 | AARCH64_INS_ANDQV, |
| 2906 | AARCH64_INS_ANDS, |
| 2907 | AARCH64_INS_ANDV, |
| 2908 | AARCH64_INS_AND, |
| 2909 | AARCH64_INS_ASRD, |
| 2910 | AARCH64_INS_ASRR, |
| 2911 | AARCH64_INS_ASR, |
| 2912 | AARCH64_INS_AUTDA, |
| 2913 | AARCH64_INS_AUTDB, |
| 2914 | AARCH64_INS_AUTDZA, |
| 2915 | AARCH64_INS_AUTDZB, |
| 2916 | AARCH64_INS_AUTIA, |
| 2917 | AARCH64_INS_HINT, |
| 2918 | AARCH64_INS_AUTIA171615, |
| 2919 | AARCH64_INS_AUTIASPPC, |
| 2920 | AARCH64_INS_AUTIB, |
| 2921 | AARCH64_INS_AUTIB171615, |
| 2922 | AARCH64_INS_AUTIBSPPC, |
| 2923 | AARCH64_INS_AUTIZA, |
| 2924 | AARCH64_INS_AUTIZB, |
| 2925 | AARCH64_INS_AXFLAG, |
| 2926 | AARCH64_INS_B, |
| 2927 | AARCH64_INS_BCAX, |
| 2928 | AARCH64_INS_BC, |
| 2929 | AARCH64_INS_BDEP, |
| 2930 | AARCH64_INS_BEXT, |
| 2931 | AARCH64_INS_BFDOT, |
| 2932 | AARCH64_INS_BF1CVTL2, |
| 2933 | AARCH64_INS_BF1CVTLT, |
| 2934 | AARCH64_INS_BF1CVTL, |
| 2935 | AARCH64_INS_BF1CVT, |
| 2936 | AARCH64_INS_BF2CVTL2, |
| 2937 | AARCH64_INS_BF2CVTLT, |
| 2938 | AARCH64_INS_BF2CVTL, |
| 2939 | AARCH64_INS_BF2CVT, |
| 2940 | AARCH64_INS_BFADD, |
| 2941 | AARCH64_INS_BFCLAMP, |
| 2942 | AARCH64_INS_BFCVT, |
| 2943 | AARCH64_INS_BFCVTN, |
| 2944 | AARCH64_INS_BFCVTN2, |
| 2945 | AARCH64_INS_BFCVTNT, |
| 2946 | AARCH64_INS_BFMAXNM, |
| 2947 | AARCH64_INS_BFMAX, |
| 2948 | AARCH64_INS_BFMINNM, |
| 2949 | AARCH64_INS_BFMIN, |
| 2950 | AARCH64_INS_BFMLALB, |
| 2951 | AARCH64_INS_BFMLALT, |
| 2952 | AARCH64_INS_BFMLAL, |
| 2953 | AARCH64_INS_BFMLA, |
| 2954 | AARCH64_INS_BFMLSLB, |
| 2955 | AARCH64_INS_BFMLSLT, |
| 2956 | AARCH64_INS_BFMLSL, |
| 2957 | AARCH64_INS_BFMLS, |
| 2958 | AARCH64_INS_BFMMLA, |
| 2959 | AARCH64_INS_BFMOPA, |
| 2960 | AARCH64_INS_BFMOPS, |
| 2961 | AARCH64_INS_BFMUL, |
| 2962 | AARCH64_INS_BFM, |
| 2963 | AARCH64_INS_BFSUB, |
| 2964 | AARCH64_INS_BFVDOT, |
| 2965 | AARCH64_INS_BGRP, |
| 2966 | AARCH64_INS_BICS, |
| 2967 | AARCH64_INS_BIC, |
| 2968 | AARCH64_INS_BIF, |
| 2969 | AARCH64_INS_BIT, |
| 2970 | AARCH64_INS_BL, |
| 2971 | AARCH64_INS_BLR, |
| 2972 | AARCH64_INS_BLRAA, |
| 2973 | AARCH64_INS_BLRAAZ, |
| 2974 | AARCH64_INS_BLRAB, |
| 2975 | AARCH64_INS_BLRABZ, |
| 2976 | AARCH64_INS_BMOPA, |
| 2977 | AARCH64_INS_BMOPS, |
| 2978 | AARCH64_INS_BR, |
| 2979 | AARCH64_INS_BRAA, |
| 2980 | AARCH64_INS_BRAAZ, |
| 2981 | AARCH64_INS_BRAB, |
| 2982 | AARCH64_INS_BRABZ, |
| 2983 | AARCH64_INS_BRB, |
| 2984 | AARCH64_INS_BRK, |
| 2985 | AARCH64_INS_BRKAS, |
| 2986 | AARCH64_INS_BRKA, |
| 2987 | AARCH64_INS_BRKBS, |
| 2988 | AARCH64_INS_BRKB, |
| 2989 | AARCH64_INS_BRKNS, |
| 2990 | AARCH64_INS_BRKN, |
| 2991 | AARCH64_INS_BRKPAS, |
| 2992 | AARCH64_INS_BRKPA, |
| 2993 | AARCH64_INS_BRKPBS, |
| 2994 | AARCH64_INS_BRKPB, |
| 2995 | AARCH64_INS_BSL1N, |
| 2996 | AARCH64_INS_BSL2N, |
| 2997 | AARCH64_INS_BSL, |
| 2998 | AARCH64_INS_CADD, |
| 2999 | AARCH64_INS_CASAB, |
| 3000 | AARCH64_INS_CASAH, |
| 3001 | AARCH64_INS_CASALB, |
| 3002 | AARCH64_INS_CASALH, |
| 3003 | AARCH64_INS_CASAL, |
| 3004 | AARCH64_INS_CASA, |
| 3005 | AARCH64_INS_CASB, |
| 3006 | AARCH64_INS_CASH, |
| 3007 | AARCH64_INS_CASLB, |
| 3008 | AARCH64_INS_CASLH, |
| 3009 | AARCH64_INS_CASL, |
| 3010 | AARCH64_INS_CASPAL, |
| 3011 | AARCH64_INS_CASPA, |
| 3012 | AARCH64_INS_CASPL, |
| 3013 | AARCH64_INS_CASP, |
| 3014 | AARCH64_INS_CAS, |
| 3015 | AARCH64_INS_CBNZ, |
| 3016 | AARCH64_INS_CBZ, |
| 3017 | AARCH64_INS_CCMN, |
| 3018 | AARCH64_INS_CCMP, |
| 3019 | AARCH64_INS_CDOT, |
| 3020 | AARCH64_INS_CFINV, |
| 3021 | AARCH64_INS_CLASTA, |
| 3022 | AARCH64_INS_CLASTB, |
| 3023 | AARCH64_INS_CLREX, |
| 3024 | AARCH64_INS_CLS, |
| 3025 | AARCH64_INS_CLZ, |
| 3026 | AARCH64_INS_CMEQ, |
| 3027 | AARCH64_INS_CMGE, |
| 3028 | AARCH64_INS_CMGT, |
| 3029 | AARCH64_INS_CMHI, |
| 3030 | AARCH64_INS_CMHS, |
| 3031 | AARCH64_INS_CMLA, |
| 3032 | AARCH64_INS_CMLE, |
| 3033 | AARCH64_INS_CMLT, |
| 3034 | AARCH64_INS_CMPEQ, |
| 3035 | AARCH64_INS_CMPGE, |
| 3036 | AARCH64_INS_CMPGT, |
| 3037 | AARCH64_INS_CMPHI, |
| 3038 | AARCH64_INS_CMPHS, |
| 3039 | AARCH64_INS_CMPLE, |
| 3040 | AARCH64_INS_CMPLO, |
| 3041 | AARCH64_INS_CMPLS, |
| 3042 | AARCH64_INS_CMPLT, |
| 3043 | AARCH64_INS_CMPNE, |
| 3044 | AARCH64_INS_CMTST, |
| 3045 | AARCH64_INS_CNOT, |
| 3046 | AARCH64_INS_CNTB, |
| 3047 | AARCH64_INS_CNTD, |
| 3048 | AARCH64_INS_CNTH, |
| 3049 | AARCH64_INS_CNTP, |
| 3050 | AARCH64_INS_CNTW, |
| 3051 | AARCH64_INS_CNT, |
| 3052 | AARCH64_INS_COMPACT, |
| 3053 | AARCH64_INS_CPYE, |
| 3054 | AARCH64_INS_CPYEN, |
| 3055 | AARCH64_INS_CPYERN, |
| 3056 | AARCH64_INS_CPYERT, |
| 3057 | AARCH64_INS_CPYERTN, |
| 3058 | AARCH64_INS_CPYERTRN, |
| 3059 | AARCH64_INS_CPYERTWN, |
| 3060 | AARCH64_INS_CPYET, |
| 3061 | AARCH64_INS_CPYETN, |
| 3062 | AARCH64_INS_CPYETRN, |
| 3063 | AARCH64_INS_CPYETWN, |
| 3064 | AARCH64_INS_CPYEWN, |
| 3065 | AARCH64_INS_CPYEWT, |
| 3066 | AARCH64_INS_CPYEWTN, |
| 3067 | AARCH64_INS_CPYEWTRN, |
| 3068 | AARCH64_INS_CPYEWTWN, |
| 3069 | AARCH64_INS_CPYFE, |
| 3070 | AARCH64_INS_CPYFEN, |
| 3071 | AARCH64_INS_CPYFERN, |
| 3072 | AARCH64_INS_CPYFERT, |
| 3073 | AARCH64_INS_CPYFERTN, |
| 3074 | AARCH64_INS_CPYFERTRN, |
| 3075 | AARCH64_INS_CPYFERTWN, |
| 3076 | AARCH64_INS_CPYFET, |
| 3077 | AARCH64_INS_CPYFETN, |
| 3078 | AARCH64_INS_CPYFETRN, |
| 3079 | AARCH64_INS_CPYFETWN, |
| 3080 | AARCH64_INS_CPYFEWN, |
| 3081 | AARCH64_INS_CPYFEWT, |
| 3082 | AARCH64_INS_CPYFEWTN, |
| 3083 | AARCH64_INS_CPYFEWTRN, |
| 3084 | AARCH64_INS_CPYFEWTWN, |
| 3085 | AARCH64_INS_CPYFM, |
| 3086 | AARCH64_INS_CPYFMN, |
| 3087 | AARCH64_INS_CPYFMRN, |
| 3088 | AARCH64_INS_CPYFMRT, |
| 3089 | AARCH64_INS_CPYFMRTN, |
| 3090 | AARCH64_INS_CPYFMRTRN, |
| 3091 | AARCH64_INS_CPYFMRTWN, |
| 3092 | AARCH64_INS_CPYFMT, |
| 3093 | AARCH64_INS_CPYFMTN, |
| 3094 | AARCH64_INS_CPYFMTRN, |
| 3095 | AARCH64_INS_CPYFMTWN, |
| 3096 | AARCH64_INS_CPYFMWN, |
| 3097 | AARCH64_INS_CPYFMWT, |
| 3098 | AARCH64_INS_CPYFMWTN, |
| 3099 | AARCH64_INS_CPYFMWTRN, |
| 3100 | AARCH64_INS_CPYFMWTWN, |
| 3101 | AARCH64_INS_CPYFP, |
| 3102 | AARCH64_INS_CPYFPN, |
| 3103 | AARCH64_INS_CPYFPRN, |
| 3104 | AARCH64_INS_CPYFPRT, |
| 3105 | AARCH64_INS_CPYFPRTN, |
| 3106 | AARCH64_INS_CPYFPRTRN, |
| 3107 | AARCH64_INS_CPYFPRTWN, |
| 3108 | AARCH64_INS_CPYFPT, |
| 3109 | AARCH64_INS_CPYFPTN, |
| 3110 | AARCH64_INS_CPYFPTRN, |
| 3111 | AARCH64_INS_CPYFPTWN, |
| 3112 | AARCH64_INS_CPYFPWN, |
| 3113 | AARCH64_INS_CPYFPWT, |
| 3114 | AARCH64_INS_CPYFPWTN, |
| 3115 | AARCH64_INS_CPYFPWTRN, |
| 3116 | AARCH64_INS_CPYFPWTWN, |
| 3117 | AARCH64_INS_CPYM, |
| 3118 | AARCH64_INS_CPYMN, |
| 3119 | AARCH64_INS_CPYMRN, |
| 3120 | AARCH64_INS_CPYMRT, |
| 3121 | AARCH64_INS_CPYMRTN, |
| 3122 | AARCH64_INS_CPYMRTRN, |
| 3123 | AARCH64_INS_CPYMRTWN, |
| 3124 | AARCH64_INS_CPYMT, |
| 3125 | AARCH64_INS_CPYMTN, |
| 3126 | AARCH64_INS_CPYMTRN, |
| 3127 | AARCH64_INS_CPYMTWN, |
| 3128 | AARCH64_INS_CPYMWN, |
| 3129 | AARCH64_INS_CPYMWT, |
| 3130 | AARCH64_INS_CPYMWTN, |
| 3131 | AARCH64_INS_CPYMWTRN, |
| 3132 | AARCH64_INS_CPYMWTWN, |
| 3133 | AARCH64_INS_CPYP, |
| 3134 | AARCH64_INS_CPYPN, |
| 3135 | AARCH64_INS_CPYPRN, |
| 3136 | AARCH64_INS_CPYPRT, |
| 3137 | AARCH64_INS_CPYPRTN, |
| 3138 | AARCH64_INS_CPYPRTRN, |
| 3139 | AARCH64_INS_CPYPRTWN, |
| 3140 | AARCH64_INS_CPYPT, |
| 3141 | AARCH64_INS_CPYPTN, |
| 3142 | AARCH64_INS_CPYPTRN, |
| 3143 | AARCH64_INS_CPYPTWN, |
| 3144 | AARCH64_INS_CPYPWN, |
| 3145 | AARCH64_INS_CPYPWT, |
| 3146 | AARCH64_INS_CPYPWTN, |
| 3147 | AARCH64_INS_CPYPWTRN, |
| 3148 | AARCH64_INS_CPYPWTWN, |
| 3149 | AARCH64_INS_CPY, |
| 3150 | AARCH64_INS_CRC32B, |
| 3151 | AARCH64_INS_CRC32CB, |
| 3152 | AARCH64_INS_CRC32CH, |
| 3153 | AARCH64_INS_CRC32CW, |
| 3154 | AARCH64_INS_CRC32CX, |
| 3155 | AARCH64_INS_CRC32H, |
| 3156 | AARCH64_INS_CRC32W, |
| 3157 | AARCH64_INS_CRC32X, |
| 3158 | AARCH64_INS_CSEL, |
| 3159 | AARCH64_INS_CSINC, |
| 3160 | AARCH64_INS_CSINV, |
| 3161 | AARCH64_INS_CSNEG, |
| 3162 | AARCH64_INS_CTERMEQ, |
| 3163 | AARCH64_INS_CTERMNE, |
| 3164 | AARCH64_INS_CTZ, |
| 3165 | AARCH64_INS_DCPS1, |
| 3166 | AARCH64_INS_DCPS2, |
| 3167 | AARCH64_INS_DCPS3, |
| 3168 | AARCH64_INS_DECB, |
| 3169 | AARCH64_INS_DECD, |
| 3170 | AARCH64_INS_DECH, |
| 3171 | AARCH64_INS_DECP, |
| 3172 | AARCH64_INS_DECW, |
| 3173 | AARCH64_INS_DMB, |
| 3174 | AARCH64_INS_DRPS, |
| 3175 | AARCH64_INS_DSB, |
| 3176 | AARCH64_INS_DUPM, |
| 3177 | AARCH64_INS_DUPQ, |
| 3178 | AARCH64_INS_DUP, |
| 3179 | AARCH64_INS_MOV, |
| 3180 | AARCH64_INS_EON, |
| 3181 | AARCH64_INS_EOR3, |
| 3182 | AARCH64_INS_EORBT, |
| 3183 | AARCH64_INS_EORQV, |
| 3184 | AARCH64_INS_EORS, |
| 3185 | AARCH64_INS_EORTB, |
| 3186 | AARCH64_INS_EORV, |
| 3187 | AARCH64_INS_EOR, |
| 3188 | AARCH64_INS_ERET, |
| 3189 | AARCH64_INS_ERETAA, |
| 3190 | AARCH64_INS_ERETAB, |
| 3191 | AARCH64_INS_EXTQ, |
| 3192 | AARCH64_INS_MOVA, |
| 3193 | AARCH64_INS_EXTR, |
| 3194 | AARCH64_INS_EXT, |
| 3195 | AARCH64_INS_F1CVTL2, |
| 3196 | AARCH64_INS_F1CVTLT, |
| 3197 | AARCH64_INS_F1CVTL, |
| 3198 | AARCH64_INS_F1CVT, |
| 3199 | AARCH64_INS_F2CVTL2, |
| 3200 | AARCH64_INS_F2CVTLT, |
| 3201 | AARCH64_INS_F2CVTL, |
| 3202 | AARCH64_INS_F2CVT, |
| 3203 | AARCH64_INS_FABD, |
| 3204 | AARCH64_INS_FABS, |
| 3205 | AARCH64_INS_FACGE, |
| 3206 | AARCH64_INS_FACGT, |
| 3207 | AARCH64_INS_FADDA, |
| 3208 | AARCH64_INS_FADD, |
| 3209 | AARCH64_INS_FADDP, |
| 3210 | AARCH64_INS_FADDQV, |
| 3211 | AARCH64_INS_FADDV, |
| 3212 | AARCH64_INS_FAMAX, |
| 3213 | AARCH64_INS_FAMIN, |
| 3214 | AARCH64_INS_FCADD, |
| 3215 | AARCH64_INS_FCCMP, |
| 3216 | AARCH64_INS_FCCMPE, |
| 3217 | AARCH64_INS_FCLAMP, |
| 3218 | AARCH64_INS_FCMEQ, |
| 3219 | AARCH64_INS_FCMGE, |
| 3220 | AARCH64_INS_FCMGT, |
| 3221 | AARCH64_INS_FCMLA, |
| 3222 | AARCH64_INS_FCMLE, |
| 3223 | AARCH64_INS_FCMLT, |
| 3224 | AARCH64_INS_FCMNE, |
| 3225 | AARCH64_INS_FCMP, |
| 3226 | AARCH64_INS_FCMPE, |
| 3227 | AARCH64_INS_FCMUO, |
| 3228 | AARCH64_INS_FCPY, |
| 3229 | AARCH64_INS_FCSEL, |
| 3230 | AARCH64_INS_FCVTAS, |
| 3231 | AARCH64_INS_FCVTAU, |
| 3232 | AARCH64_INS_FCVT, |
| 3233 | AARCH64_INS_FCVTLT, |
| 3234 | AARCH64_INS_FCVTL, |
| 3235 | AARCH64_INS_FCVTL2, |
| 3236 | AARCH64_INS_FCVTMS, |
| 3237 | AARCH64_INS_FCVTMU, |
| 3238 | AARCH64_INS_FCVTNB, |
| 3239 | AARCH64_INS_FCVTNS, |
| 3240 | AARCH64_INS_FCVTNT, |
| 3241 | AARCH64_INS_FCVTNU, |
| 3242 | AARCH64_INS_FCVTN, |
| 3243 | AARCH64_INS_FCVTN2, |
| 3244 | AARCH64_INS_FCVTPS, |
| 3245 | AARCH64_INS_FCVTPU, |
| 3246 | AARCH64_INS_FCVTXNT, |
| 3247 | AARCH64_INS_FCVTXN, |
| 3248 | AARCH64_INS_FCVTXN2, |
| 3249 | AARCH64_INS_FCVTX, |
| 3250 | AARCH64_INS_FCVTZS, |
| 3251 | AARCH64_INS_FCVTZU, |
| 3252 | AARCH64_INS_FDIV, |
| 3253 | AARCH64_INS_FDIVR, |
| 3254 | AARCH64_INS_FDOT, |
| 3255 | AARCH64_INS_FDUP, |
| 3256 | AARCH64_INS_FEXPA, |
| 3257 | AARCH64_INS_FJCVTZS, |
| 3258 | AARCH64_INS_FLOGB, |
| 3259 | AARCH64_INS_FMADD, |
| 3260 | AARCH64_INS_FMAD, |
| 3261 | AARCH64_INS_FMAX, |
| 3262 | AARCH64_INS_FMAXNM, |
| 3263 | AARCH64_INS_FMAXNMP, |
| 3264 | AARCH64_INS_FMAXNMQV, |
| 3265 | AARCH64_INS_FMAXNMV, |
| 3266 | AARCH64_INS_FMAXP, |
| 3267 | AARCH64_INS_FMAXQV, |
| 3268 | AARCH64_INS_FMAXV, |
| 3269 | AARCH64_INS_FMIN, |
| 3270 | AARCH64_INS_FMINNM, |
| 3271 | AARCH64_INS_FMINNMP, |
| 3272 | AARCH64_INS_FMINNMQV, |
| 3273 | AARCH64_INS_FMINNMV, |
| 3274 | AARCH64_INS_FMINP, |
| 3275 | AARCH64_INS_FMINQV, |
| 3276 | AARCH64_INS_FMINV, |
| 3277 | AARCH64_INS_FMLAL2, |
| 3278 | AARCH64_INS_FMLALB, |
| 3279 | AARCH64_INS_FMLALLBB, |
| 3280 | AARCH64_INS_FMLALLBT, |
| 3281 | AARCH64_INS_FMLALLTB, |
| 3282 | AARCH64_INS_FMLALLTT, |
| 3283 | AARCH64_INS_FMLALL, |
| 3284 | AARCH64_INS_FMLALT, |
| 3285 | AARCH64_INS_FMLAL, |
| 3286 | AARCH64_INS_FMLA, |
| 3287 | AARCH64_INS_FMLSL2, |
| 3288 | AARCH64_INS_FMLSLB, |
| 3289 | AARCH64_INS_FMLSLT, |
| 3290 | AARCH64_INS_FMLSL, |
| 3291 | AARCH64_INS_FMLS, |
| 3292 | AARCH64_INS_FMMLA, |
| 3293 | AARCH64_INS_FMOPA, |
| 3294 | AARCH64_INS_FMOPS, |
| 3295 | AARCH64_INS_FMOV, |
| 3296 | AARCH64_INS_FMSB, |
| 3297 | AARCH64_INS_FMSUB, |
| 3298 | AARCH64_INS_FMUL, |
| 3299 | AARCH64_INS_FMULX, |
| 3300 | AARCH64_INS_FNEG, |
| 3301 | AARCH64_INS_FNMADD, |
| 3302 | AARCH64_INS_FNMAD, |
| 3303 | AARCH64_INS_FNMLA, |
| 3304 | AARCH64_INS_FNMLS, |
| 3305 | AARCH64_INS_FNMSB, |
| 3306 | AARCH64_INS_FNMSUB, |
| 3307 | AARCH64_INS_FNMUL, |
| 3308 | AARCH64_INS_FRECPE, |
| 3309 | AARCH64_INS_FRECPS, |
| 3310 | AARCH64_INS_FRECPX, |
| 3311 | AARCH64_INS_FRINT32X, |
| 3312 | AARCH64_INS_FRINT32Z, |
| 3313 | AARCH64_INS_FRINT64X, |
| 3314 | AARCH64_INS_FRINT64Z, |
| 3315 | AARCH64_INS_FRINTA, |
| 3316 | AARCH64_INS_FRINTI, |
| 3317 | AARCH64_INS_FRINTM, |
| 3318 | AARCH64_INS_FRINTN, |
| 3319 | AARCH64_INS_FRINTP, |
| 3320 | AARCH64_INS_FRINTX, |
| 3321 | AARCH64_INS_FRINTZ, |
| 3322 | AARCH64_INS_FRSQRTE, |
| 3323 | AARCH64_INS_FRSQRTS, |
| 3324 | AARCH64_INS_FSCALE, |
| 3325 | AARCH64_INS_FSQRT, |
| 3326 | AARCH64_INS_FSUB, |
| 3327 | AARCH64_INS_FSUBR, |
| 3328 | AARCH64_INS_FTMAD, |
| 3329 | AARCH64_INS_FTSMUL, |
| 3330 | AARCH64_INS_FTSSEL, |
| 3331 | AARCH64_INS_FVDOTB, |
| 3332 | AARCH64_INS_FVDOTT, |
| 3333 | AARCH64_INS_FVDOT, |
| 3334 | AARCH64_INS_GCSPOPCX, |
| 3335 | AARCH64_INS_GCSPOPM, |
| 3336 | AARCH64_INS_GCSPOPX, |
| 3337 | AARCH64_INS_GCSPUSHM, |
| 3338 | AARCH64_INS_GCSPUSHX, |
| 3339 | AARCH64_INS_GCSSS1, |
| 3340 | AARCH64_INS_GCSSS2, |
| 3341 | AARCH64_INS_GCSSTR, |
| 3342 | AARCH64_INS_GCSSTTR, |
| 3343 | AARCH64_INS_LD1B, |
| 3344 | AARCH64_INS_LD1D, |
| 3345 | AARCH64_INS_LD1H, |
| 3346 | AARCH64_INS_LD1Q, |
| 3347 | AARCH64_INS_LD1SB, |
| 3348 | AARCH64_INS_LD1SH, |
| 3349 | AARCH64_INS_LD1SW, |
| 3350 | AARCH64_INS_LD1W, |
| 3351 | AARCH64_INS_LDFF1B, |
| 3352 | AARCH64_INS_LDFF1D, |
| 3353 | AARCH64_INS_LDFF1H, |
| 3354 | AARCH64_INS_LDFF1SB, |
| 3355 | AARCH64_INS_LDFF1SH, |
| 3356 | AARCH64_INS_LDFF1SW, |
| 3357 | AARCH64_INS_LDFF1W, |
| 3358 | AARCH64_INS_GMI, |
| 3359 | AARCH64_INS_HISTCNT, |
| 3360 | AARCH64_INS_HISTSEG, |
| 3361 | AARCH64_INS_HLT, |
| 3362 | AARCH64_INS_HVC, |
| 3363 | AARCH64_INS_INCB, |
| 3364 | AARCH64_INS_INCD, |
| 3365 | AARCH64_INS_INCH, |
| 3366 | AARCH64_INS_INCP, |
| 3367 | AARCH64_INS_INCW, |
| 3368 | AARCH64_INS_INDEX, |
| 3369 | AARCH64_INS_INSR, |
| 3370 | AARCH64_INS_INS, |
| 3371 | AARCH64_INS_IRG, |
| 3372 | AARCH64_INS_ISB, |
| 3373 | AARCH64_INS_LASTA, |
| 3374 | AARCH64_INS_LASTB, |
| 3375 | AARCH64_INS_LD1, |
| 3376 | AARCH64_INS_LD1RB, |
| 3377 | AARCH64_INS_LD1RD, |
| 3378 | AARCH64_INS_LD1RH, |
| 3379 | AARCH64_INS_LD1ROB, |
| 3380 | AARCH64_INS_LD1ROD, |
| 3381 | AARCH64_INS_LD1ROH, |
| 3382 | AARCH64_INS_LD1ROW, |
| 3383 | AARCH64_INS_LD1RQB, |
| 3384 | AARCH64_INS_LD1RQD, |
| 3385 | AARCH64_INS_LD1RQH, |
| 3386 | AARCH64_INS_LD1RQW, |
| 3387 | AARCH64_INS_LD1RSB, |
| 3388 | AARCH64_INS_LD1RSH, |
| 3389 | AARCH64_INS_LD1RSW, |
| 3390 | AARCH64_INS_LD1RW, |
| 3391 | AARCH64_INS_LD1R, |
| 3392 | AARCH64_INS_LD2B, |
| 3393 | AARCH64_INS_LD2D, |
| 3394 | AARCH64_INS_LD2H, |
| 3395 | AARCH64_INS_LD2Q, |
| 3396 | AARCH64_INS_LD2R, |
| 3397 | AARCH64_INS_LD2, |
| 3398 | AARCH64_INS_LD2W, |
| 3399 | AARCH64_INS_LD3B, |
| 3400 | AARCH64_INS_LD3D, |
| 3401 | AARCH64_INS_LD3H, |
| 3402 | AARCH64_INS_LD3Q, |
| 3403 | AARCH64_INS_LD3R, |
| 3404 | AARCH64_INS_LD3, |
| 3405 | AARCH64_INS_LD3W, |
| 3406 | AARCH64_INS_LD4B, |
| 3407 | AARCH64_INS_LD4D, |
| 3408 | AARCH64_INS_LD4, |
| 3409 | AARCH64_INS_LD4H, |
| 3410 | AARCH64_INS_LD4Q, |
| 3411 | AARCH64_INS_LD4R, |
| 3412 | AARCH64_INS_LD4W, |
| 3413 | AARCH64_INS_LD64B, |
| 3414 | AARCH64_INS_LDADDAB, |
| 3415 | AARCH64_INS_LDADDAH, |
| 3416 | AARCH64_INS_LDADDALB, |
| 3417 | AARCH64_INS_LDADDALH, |
| 3418 | AARCH64_INS_LDADDAL, |
| 3419 | AARCH64_INS_LDADDA, |
| 3420 | AARCH64_INS_LDADDB, |
| 3421 | AARCH64_INS_LDADDH, |
| 3422 | AARCH64_INS_LDADDLB, |
| 3423 | AARCH64_INS_LDADDLH, |
| 3424 | AARCH64_INS_LDADDL, |
| 3425 | AARCH64_INS_LDADD, |
| 3426 | AARCH64_INS_LDAP1, |
| 3427 | AARCH64_INS_LDAPRB, |
| 3428 | AARCH64_INS_LDAPRH, |
| 3429 | AARCH64_INS_LDAPR, |
| 3430 | AARCH64_INS_LDAPURB, |
| 3431 | AARCH64_INS_LDAPURH, |
| 3432 | AARCH64_INS_LDAPURSB, |
| 3433 | AARCH64_INS_LDAPURSH, |
| 3434 | AARCH64_INS_LDAPURSW, |
| 3435 | AARCH64_INS_LDAPUR, |
| 3436 | AARCH64_INS_LDARB, |
| 3437 | AARCH64_INS_LDARH, |
| 3438 | AARCH64_INS_LDAR, |
| 3439 | AARCH64_INS_LDAXP, |
| 3440 | AARCH64_INS_LDAXRB, |
| 3441 | AARCH64_INS_LDAXRH, |
| 3442 | AARCH64_INS_LDAXR, |
| 3443 | AARCH64_INS_LDCLRAB, |
| 3444 | AARCH64_INS_LDCLRAH, |
| 3445 | AARCH64_INS_LDCLRALB, |
| 3446 | AARCH64_INS_LDCLRALH, |
| 3447 | AARCH64_INS_LDCLRAL, |
| 3448 | AARCH64_INS_LDCLRA, |
| 3449 | AARCH64_INS_LDCLRB, |
| 3450 | AARCH64_INS_LDCLRH, |
| 3451 | AARCH64_INS_LDCLRLB, |
| 3452 | AARCH64_INS_LDCLRLH, |
| 3453 | AARCH64_INS_LDCLRL, |
| 3454 | AARCH64_INS_LDCLRP, |
| 3455 | AARCH64_INS_LDCLRPA, |
| 3456 | AARCH64_INS_LDCLRPAL, |
| 3457 | AARCH64_INS_LDCLRPL, |
| 3458 | AARCH64_INS_LDCLR, |
| 3459 | AARCH64_INS_LDEORAB, |
| 3460 | AARCH64_INS_LDEORAH, |
| 3461 | AARCH64_INS_LDEORALB, |
| 3462 | AARCH64_INS_LDEORALH, |
| 3463 | AARCH64_INS_LDEORAL, |
| 3464 | AARCH64_INS_LDEORA, |
| 3465 | AARCH64_INS_LDEORB, |
| 3466 | AARCH64_INS_LDEORH, |
| 3467 | AARCH64_INS_LDEORLB, |
| 3468 | AARCH64_INS_LDEORLH, |
| 3469 | AARCH64_INS_LDEORL, |
| 3470 | AARCH64_INS_LDEOR, |
| 3471 | AARCH64_INS_LDG, |
| 3472 | AARCH64_INS_LDGM, |
| 3473 | AARCH64_INS_LDIAPP, |
| 3474 | AARCH64_INS_LDLARB, |
| 3475 | AARCH64_INS_LDLARH, |
| 3476 | AARCH64_INS_LDLAR, |
| 3477 | AARCH64_INS_LDNF1B, |
| 3478 | AARCH64_INS_LDNF1D, |
| 3479 | AARCH64_INS_LDNF1H, |
| 3480 | AARCH64_INS_LDNF1SB, |
| 3481 | AARCH64_INS_LDNF1SH, |
| 3482 | AARCH64_INS_LDNF1SW, |
| 3483 | AARCH64_INS_LDNF1W, |
| 3484 | AARCH64_INS_LDNP, |
| 3485 | AARCH64_INS_LDNT1B, |
| 3486 | AARCH64_INS_LDNT1D, |
| 3487 | AARCH64_INS_LDNT1H, |
| 3488 | AARCH64_INS_LDNT1SB, |
| 3489 | AARCH64_INS_LDNT1SH, |
| 3490 | AARCH64_INS_LDNT1SW, |
| 3491 | AARCH64_INS_LDNT1W, |
| 3492 | AARCH64_INS_LDP, |
| 3493 | AARCH64_INS_LDPSW, |
| 3494 | AARCH64_INS_LDRAA, |
| 3495 | AARCH64_INS_LDRAB, |
| 3496 | AARCH64_INS_LDRB, |
| 3497 | AARCH64_INS_LDR, |
| 3498 | AARCH64_INS_LDRH, |
| 3499 | AARCH64_INS_LDRSB, |
| 3500 | AARCH64_INS_LDRSH, |
| 3501 | AARCH64_INS_LDRSW, |
| 3502 | AARCH64_INS_LDSETAB, |
| 3503 | AARCH64_INS_LDSETAH, |
| 3504 | AARCH64_INS_LDSETALB, |
| 3505 | AARCH64_INS_LDSETALH, |
| 3506 | AARCH64_INS_LDSETAL, |
| 3507 | AARCH64_INS_LDSETA, |
| 3508 | AARCH64_INS_LDSETB, |
| 3509 | AARCH64_INS_LDSETH, |
| 3510 | AARCH64_INS_LDSETLB, |
| 3511 | AARCH64_INS_LDSETLH, |
| 3512 | AARCH64_INS_LDSETL, |
| 3513 | AARCH64_INS_LDSETP, |
| 3514 | AARCH64_INS_LDSETPA, |
| 3515 | AARCH64_INS_LDSETPAL, |
| 3516 | AARCH64_INS_LDSETPL, |
| 3517 | AARCH64_INS_LDSET, |
| 3518 | AARCH64_INS_LDSMAXAB, |
| 3519 | AARCH64_INS_LDSMAXAH, |
| 3520 | AARCH64_INS_LDSMAXALB, |
| 3521 | AARCH64_INS_LDSMAXALH, |
| 3522 | AARCH64_INS_LDSMAXAL, |
| 3523 | AARCH64_INS_LDSMAXA, |
| 3524 | AARCH64_INS_LDSMAXB, |
| 3525 | AARCH64_INS_LDSMAXH, |
| 3526 | AARCH64_INS_LDSMAXLB, |
| 3527 | AARCH64_INS_LDSMAXLH, |
| 3528 | AARCH64_INS_LDSMAXL, |
| 3529 | AARCH64_INS_LDSMAX, |
| 3530 | AARCH64_INS_LDSMINAB, |
| 3531 | AARCH64_INS_LDSMINAH, |
| 3532 | AARCH64_INS_LDSMINALB, |
| 3533 | AARCH64_INS_LDSMINALH, |
| 3534 | AARCH64_INS_LDSMINAL, |
| 3535 | AARCH64_INS_LDSMINA, |
| 3536 | AARCH64_INS_LDSMINB, |
| 3537 | AARCH64_INS_LDSMINH, |
| 3538 | AARCH64_INS_LDSMINLB, |
| 3539 | AARCH64_INS_LDSMINLH, |
| 3540 | AARCH64_INS_LDSMINL, |
| 3541 | AARCH64_INS_LDSMIN, |
| 3542 | AARCH64_INS_LDTRB, |
| 3543 | AARCH64_INS_LDTRH, |
| 3544 | AARCH64_INS_LDTRSB, |
| 3545 | AARCH64_INS_LDTRSH, |
| 3546 | AARCH64_INS_LDTRSW, |
| 3547 | AARCH64_INS_LDTR, |
| 3548 | AARCH64_INS_LDUMAXAB, |
| 3549 | AARCH64_INS_LDUMAXAH, |
| 3550 | AARCH64_INS_LDUMAXALB, |
| 3551 | AARCH64_INS_LDUMAXALH, |
| 3552 | AARCH64_INS_LDUMAXAL, |
| 3553 | AARCH64_INS_LDUMAXA, |
| 3554 | AARCH64_INS_LDUMAXB, |
| 3555 | AARCH64_INS_LDUMAXH, |
| 3556 | AARCH64_INS_LDUMAXLB, |
| 3557 | AARCH64_INS_LDUMAXLH, |
| 3558 | AARCH64_INS_LDUMAXL, |
| 3559 | AARCH64_INS_LDUMAX, |
| 3560 | AARCH64_INS_LDUMINAB, |
| 3561 | AARCH64_INS_LDUMINAH, |
| 3562 | AARCH64_INS_LDUMINALB, |
| 3563 | AARCH64_INS_LDUMINALH, |
| 3564 | AARCH64_INS_LDUMINAL, |
| 3565 | AARCH64_INS_LDUMINA, |
| 3566 | AARCH64_INS_LDUMINB, |
| 3567 | AARCH64_INS_LDUMINH, |
| 3568 | AARCH64_INS_LDUMINLB, |
| 3569 | AARCH64_INS_LDUMINLH, |
| 3570 | AARCH64_INS_LDUMINL, |
| 3571 | AARCH64_INS_LDUMIN, |
| 3572 | AARCH64_INS_LDURB, |
| 3573 | AARCH64_INS_LDUR, |
| 3574 | AARCH64_INS_LDURH, |
| 3575 | AARCH64_INS_LDURSB, |
| 3576 | AARCH64_INS_LDURSH, |
| 3577 | AARCH64_INS_LDURSW, |
| 3578 | AARCH64_INS_LDXP, |
| 3579 | AARCH64_INS_LDXRB, |
| 3580 | AARCH64_INS_LDXRH, |
| 3581 | AARCH64_INS_LDXR, |
| 3582 | AARCH64_INS_LSLR, |
| 3583 | AARCH64_INS_LSL, |
| 3584 | AARCH64_INS_LSRR, |
| 3585 | AARCH64_INS_LSR, |
| 3586 | AARCH64_INS_LUTI2, |
| 3587 | AARCH64_INS_LUTI4, |
| 3588 | AARCH64_INS_MADDPT, |
| 3589 | AARCH64_INS_MADD, |
| 3590 | AARCH64_INS_MADPT, |
| 3591 | AARCH64_INS_MAD, |
| 3592 | AARCH64_INS_MATCH, |
| 3593 | AARCH64_INS_MLAPT, |
| 3594 | AARCH64_INS_MLA, |
| 3595 | AARCH64_INS_MLS, |
| 3596 | AARCH64_INS_SETGE, |
| 3597 | AARCH64_INS_SETGEN, |
| 3598 | AARCH64_INS_SETGET, |
| 3599 | AARCH64_INS_SETGETN, |
| 3600 | AARCH64_INS_MOVAZ, |
| 3601 | AARCH64_INS_MOVI, |
| 3602 | AARCH64_INS_MOVK, |
| 3603 | AARCH64_INS_MOVN, |
| 3604 | AARCH64_INS_MOVPRFX, |
| 3605 | AARCH64_INS_MOVT, |
| 3606 | AARCH64_INS_MOVZ, |
| 3607 | AARCH64_INS_MRRS, |
| 3608 | AARCH64_INS_MRS, |
| 3609 | AARCH64_INS_MSB, |
| 3610 | AARCH64_INS_MSR, |
| 3611 | AARCH64_INS_MSRR, |
| 3612 | AARCH64_INS_MSUBPT, |
| 3613 | AARCH64_INS_MSUB, |
| 3614 | AARCH64_INS_MUL, |
| 3615 | AARCH64_INS_MVNI, |
| 3616 | AARCH64_INS_NANDS, |
| 3617 | AARCH64_INS_NAND, |
| 3618 | AARCH64_INS_NBSL, |
| 3619 | AARCH64_INS_NEG, |
| 3620 | AARCH64_INS_NMATCH, |
| 3621 | AARCH64_INS_NORS, |
| 3622 | AARCH64_INS_NOR, |
| 3623 | AARCH64_INS_NOT, |
| 3624 | AARCH64_INS_ORNS, |
| 3625 | AARCH64_INS_ORN, |
| 3626 | AARCH64_INS_ORQV, |
| 3627 | AARCH64_INS_ORRS, |
| 3628 | AARCH64_INS_ORR, |
| 3629 | AARCH64_INS_ORV, |
| 3630 | AARCH64_INS_PACDA, |
| 3631 | AARCH64_INS_PACDB, |
| 3632 | AARCH64_INS_PACDZA, |
| 3633 | AARCH64_INS_PACDZB, |
| 3634 | AARCH64_INS_PACGA, |
| 3635 | AARCH64_INS_PACIA, |
| 3636 | AARCH64_INS_PACIA171615, |
| 3637 | AARCH64_INS_PACIASPPC, |
| 3638 | AARCH64_INS_PACIB, |
| 3639 | AARCH64_INS_PACIB171615, |
| 3640 | AARCH64_INS_PACIBSPPC, |
| 3641 | AARCH64_INS_PACIZA, |
| 3642 | AARCH64_INS_PACIZB, |
| 3643 | AARCH64_INS_PACNBIASPPC, |
| 3644 | AARCH64_INS_PACNBIBSPPC, |
| 3645 | AARCH64_INS_PEXT, |
| 3646 | AARCH64_INS_PFALSE, |
| 3647 | AARCH64_INS_PFIRST, |
| 3648 | AARCH64_INS_PMOV, |
| 3649 | AARCH64_INS_PMULLB, |
| 3650 | AARCH64_INS_PMULLT, |
| 3651 | AARCH64_INS_PMULL2, |
| 3652 | AARCH64_INS_PMULL, |
| 3653 | AARCH64_INS_PMUL, |
| 3654 | AARCH64_INS_PNEXT, |
| 3655 | AARCH64_INS_PRFB, |
| 3656 | AARCH64_INS_PRFD, |
| 3657 | AARCH64_INS_PRFH, |
| 3658 | AARCH64_INS_PRFM, |
| 3659 | AARCH64_INS_PRFUM, |
| 3660 | AARCH64_INS_PRFW, |
| 3661 | AARCH64_INS_PSEL, |
| 3662 | AARCH64_INS_PTEST, |
| 3663 | AARCH64_INS_PTRUES, |
| 3664 | AARCH64_INS_PTRUE, |
| 3665 | AARCH64_INS_PUNPKHI, |
| 3666 | AARCH64_INS_PUNPKLO, |
| 3667 | AARCH64_INS_RADDHNB, |
| 3668 | AARCH64_INS_RADDHNT, |
| 3669 | AARCH64_INS_RADDHN, |
| 3670 | AARCH64_INS_RADDHN2, |
| 3671 | AARCH64_INS_RAX1, |
| 3672 | AARCH64_INS_RBIT, |
| 3673 | AARCH64_INS_RCWCAS, |
| 3674 | AARCH64_INS_RCWCASA, |
| 3675 | AARCH64_INS_RCWCASAL, |
| 3676 | AARCH64_INS_RCWCASL, |
| 3677 | AARCH64_INS_RCWCASP, |
| 3678 | AARCH64_INS_RCWCASPA, |
| 3679 | AARCH64_INS_RCWCASPAL, |
| 3680 | AARCH64_INS_RCWCASPL, |
| 3681 | AARCH64_INS_RCWCLR, |
| 3682 | AARCH64_INS_RCWCLRA, |
| 3683 | AARCH64_INS_RCWCLRAL, |
| 3684 | AARCH64_INS_RCWCLRL, |
| 3685 | AARCH64_INS_RCWCLRP, |
| 3686 | AARCH64_INS_RCWCLRPA, |
| 3687 | AARCH64_INS_RCWCLRPAL, |
| 3688 | AARCH64_INS_RCWCLRPL, |
| 3689 | AARCH64_INS_RCWSCLR, |
| 3690 | AARCH64_INS_RCWSCLRA, |
| 3691 | AARCH64_INS_RCWSCLRAL, |
| 3692 | AARCH64_INS_RCWSCLRL, |
| 3693 | AARCH64_INS_RCWSCLRP, |
| 3694 | AARCH64_INS_RCWSCLRPA, |
| 3695 | AARCH64_INS_RCWSCLRPAL, |
| 3696 | AARCH64_INS_RCWSCLRPL, |
| 3697 | AARCH64_INS_RCWSCAS, |
| 3698 | AARCH64_INS_RCWSCASA, |
| 3699 | AARCH64_INS_RCWSCASAL, |
| 3700 | AARCH64_INS_RCWSCASL, |
| 3701 | AARCH64_INS_RCWSCASP, |
| 3702 | AARCH64_INS_RCWSCASPA, |
| 3703 | AARCH64_INS_RCWSCASPAL, |
| 3704 | AARCH64_INS_RCWSCASPL, |
| 3705 | AARCH64_INS_RCWSET, |
| 3706 | AARCH64_INS_RCWSETA, |
| 3707 | AARCH64_INS_RCWSETAL, |
| 3708 | AARCH64_INS_RCWSETL, |
| 3709 | AARCH64_INS_RCWSETP, |
| 3710 | AARCH64_INS_RCWSETPA, |
| 3711 | AARCH64_INS_RCWSETPAL, |
| 3712 | AARCH64_INS_RCWSETPL, |
| 3713 | AARCH64_INS_RCWSSET, |
| 3714 | AARCH64_INS_RCWSSETA, |
| 3715 | AARCH64_INS_RCWSSETAL, |
| 3716 | AARCH64_INS_RCWSSETL, |
| 3717 | AARCH64_INS_RCWSSETP, |
| 3718 | AARCH64_INS_RCWSSETPA, |
| 3719 | AARCH64_INS_RCWSSETPAL, |
| 3720 | AARCH64_INS_RCWSSETPL, |
| 3721 | AARCH64_INS_RCWSWP, |
| 3722 | AARCH64_INS_RCWSWPA, |
| 3723 | AARCH64_INS_RCWSWPAL, |
| 3724 | AARCH64_INS_RCWSWPL, |
| 3725 | AARCH64_INS_RCWSWPP, |
| 3726 | AARCH64_INS_RCWSWPPA, |
| 3727 | AARCH64_INS_RCWSWPPAL, |
| 3728 | AARCH64_INS_RCWSWPPL, |
| 3729 | AARCH64_INS_RCWSSWP, |
| 3730 | AARCH64_INS_RCWSSWPA, |
| 3731 | AARCH64_INS_RCWSSWPAL, |
| 3732 | AARCH64_INS_RCWSSWPL, |
| 3733 | AARCH64_INS_RCWSSWPP, |
| 3734 | AARCH64_INS_RCWSSWPPA, |
| 3735 | AARCH64_INS_RCWSSWPPAL, |
| 3736 | AARCH64_INS_RCWSSWPPL, |
| 3737 | AARCH64_INS_RDFFRS, |
| 3738 | AARCH64_INS_RDFFR, |
| 3739 | AARCH64_INS_RDSVL, |
| 3740 | AARCH64_INS_RDVL, |
| 3741 | AARCH64_INS_RET, |
| 3742 | AARCH64_INS_RETAA, |
| 3743 | AARCH64_INS_RETAASPPC, |
| 3744 | AARCH64_INS_RETAB, |
| 3745 | AARCH64_INS_RETABSPPC, |
| 3746 | AARCH64_INS_REV16, |
| 3747 | AARCH64_INS_REV32, |
| 3748 | AARCH64_INS_REV64, |
| 3749 | AARCH64_INS_REVB, |
| 3750 | AARCH64_INS_REVD, |
| 3751 | AARCH64_INS_REVH, |
| 3752 | AARCH64_INS_REVW, |
| 3753 | AARCH64_INS_REV, |
| 3754 | AARCH64_INS_RMIF, |
| 3755 | AARCH64_INS_ROR, |
| 3756 | AARCH64_INS_RPRFM, |
| 3757 | AARCH64_INS_RSHRNB, |
| 3758 | AARCH64_INS_RSHRNT, |
| 3759 | AARCH64_INS_RSHRN2, |
| 3760 | AARCH64_INS_RSHRN, |
| 3761 | AARCH64_INS_RSUBHNB, |
| 3762 | AARCH64_INS_RSUBHNT, |
| 3763 | AARCH64_INS_RSUBHN, |
| 3764 | AARCH64_INS_RSUBHN2, |
| 3765 | AARCH64_INS_SABALB, |
| 3766 | AARCH64_INS_SABALT, |
| 3767 | AARCH64_INS_SABAL2, |
| 3768 | AARCH64_INS_SABAL, |
| 3769 | AARCH64_INS_SABA, |
| 3770 | AARCH64_INS_SABDLB, |
| 3771 | AARCH64_INS_SABDLT, |
| 3772 | AARCH64_INS_SABDL2, |
| 3773 | AARCH64_INS_SABDL, |
| 3774 | AARCH64_INS_SABD, |
| 3775 | AARCH64_INS_SADALP, |
| 3776 | AARCH64_INS_SADDLBT, |
| 3777 | AARCH64_INS_SADDLB, |
| 3778 | AARCH64_INS_SADDLP, |
| 3779 | AARCH64_INS_SADDLT, |
| 3780 | AARCH64_INS_SADDLV, |
| 3781 | AARCH64_INS_SADDL2, |
| 3782 | AARCH64_INS_SADDL, |
| 3783 | AARCH64_INS_SADDV, |
| 3784 | AARCH64_INS_SADDWB, |
| 3785 | AARCH64_INS_SADDWT, |
| 3786 | AARCH64_INS_SADDW2, |
| 3787 | AARCH64_INS_SADDW, |
| 3788 | AARCH64_INS_SB, |
| 3789 | AARCH64_INS_SBCLB, |
| 3790 | AARCH64_INS_SBCLT, |
| 3791 | AARCH64_INS_SBCS, |
| 3792 | AARCH64_INS_SBC, |
| 3793 | AARCH64_INS_SBFM, |
| 3794 | AARCH64_INS_SCLAMP, |
| 3795 | AARCH64_INS_SCVTF, |
| 3796 | AARCH64_INS_SDIVR, |
| 3797 | AARCH64_INS_SDIV, |
| 3798 | AARCH64_INS_SDOT, |
| 3799 | AARCH64_INS_SEL, |
| 3800 | AARCH64_INS_SETE, |
| 3801 | AARCH64_INS_SETEN, |
| 3802 | AARCH64_INS_SETET, |
| 3803 | AARCH64_INS_SETETN, |
| 3804 | AARCH64_INS_SETF16, |
| 3805 | AARCH64_INS_SETF8, |
| 3806 | AARCH64_INS_SETFFR, |
| 3807 | AARCH64_INS_SETGM, |
| 3808 | AARCH64_INS_SETGMN, |
| 3809 | AARCH64_INS_SETGMT, |
| 3810 | AARCH64_INS_SETGMTN, |
| 3811 | AARCH64_INS_SETGP, |
| 3812 | AARCH64_INS_SETGPN, |
| 3813 | AARCH64_INS_SETGPT, |
| 3814 | AARCH64_INS_SETGPTN, |
| 3815 | AARCH64_INS_SETM, |
| 3816 | AARCH64_INS_SETMN, |
| 3817 | AARCH64_INS_SETMT, |
| 3818 | AARCH64_INS_SETMTN, |
| 3819 | AARCH64_INS_SETP, |
| 3820 | AARCH64_INS_SETPN, |
| 3821 | AARCH64_INS_SETPT, |
| 3822 | AARCH64_INS_SETPTN, |
| 3823 | AARCH64_INS_SHA1C, |
| 3824 | AARCH64_INS_SHA1H, |
| 3825 | AARCH64_INS_SHA1M, |
| 3826 | AARCH64_INS_SHA1P, |
| 3827 | AARCH64_INS_SHA1SU0, |
| 3828 | AARCH64_INS_SHA1SU1, |
| 3829 | AARCH64_INS_SHA256H2, |
| 3830 | AARCH64_INS_SHA256H, |
| 3831 | AARCH64_INS_SHA256SU0, |
| 3832 | AARCH64_INS_SHA256SU1, |
| 3833 | AARCH64_INS_SHA512H, |
| 3834 | AARCH64_INS_SHA512H2, |
| 3835 | AARCH64_INS_SHA512SU0, |
| 3836 | AARCH64_INS_SHA512SU1, |
| 3837 | AARCH64_INS_SHADD, |
| 3838 | AARCH64_INS_SHLL2, |
| 3839 | AARCH64_INS_SHLL, |
| 3840 | AARCH64_INS_SHL, |
| 3841 | AARCH64_INS_SHRNB, |
| 3842 | AARCH64_INS_SHRNT, |
| 3843 | AARCH64_INS_SHRN2, |
| 3844 | AARCH64_INS_SHRN, |
| 3845 | AARCH64_INS_SHSUBR, |
| 3846 | AARCH64_INS_SHSUB, |
| 3847 | AARCH64_INS_SLI, |
| 3848 | AARCH64_INS_SM3PARTW1, |
| 3849 | AARCH64_INS_SM3PARTW2, |
| 3850 | AARCH64_INS_SM3SS1, |
| 3851 | AARCH64_INS_SM3TT1A, |
| 3852 | AARCH64_INS_SM3TT1B, |
| 3853 | AARCH64_INS_SM3TT2A, |
| 3854 | AARCH64_INS_SM3TT2B, |
| 3855 | AARCH64_INS_SM4E, |
| 3856 | AARCH64_INS_SM4EKEY, |
| 3857 | AARCH64_INS_SMADDL, |
| 3858 | AARCH64_INS_SMAXP, |
| 3859 | AARCH64_INS_SMAXQV, |
| 3860 | AARCH64_INS_SMAXV, |
| 3861 | AARCH64_INS_SMAX, |
| 3862 | AARCH64_INS_SMC, |
| 3863 | AARCH64_INS_SMINP, |
| 3864 | AARCH64_INS_SMINQV, |
| 3865 | AARCH64_INS_SMINV, |
| 3866 | AARCH64_INS_SMIN, |
| 3867 | AARCH64_INS_SMLALB, |
| 3868 | AARCH64_INS_SMLALL, |
| 3869 | AARCH64_INS_SMLALT, |
| 3870 | AARCH64_INS_SMLAL, |
| 3871 | AARCH64_INS_SMLAL2, |
| 3872 | AARCH64_INS_SMLSLB, |
| 3873 | AARCH64_INS_SMLSLL, |
| 3874 | AARCH64_INS_SMLSLT, |
| 3875 | AARCH64_INS_SMLSL, |
| 3876 | AARCH64_INS_SMLSL2, |
| 3877 | AARCH64_INS_SMMLA, |
| 3878 | AARCH64_INS_SMOPA, |
| 3879 | AARCH64_INS_SMOPS, |
| 3880 | AARCH64_INS_SMOV, |
| 3881 | AARCH64_INS_SMSUBL, |
| 3882 | AARCH64_INS_SMULH, |
| 3883 | AARCH64_INS_SMULLB, |
| 3884 | AARCH64_INS_SMULLT, |
| 3885 | AARCH64_INS_SMULL2, |
| 3886 | AARCH64_INS_SMULL, |
| 3887 | AARCH64_INS_SPLICE, |
| 3888 | AARCH64_INS_SQABS, |
| 3889 | AARCH64_INS_SQADD, |
| 3890 | AARCH64_INS_SQCADD, |
| 3891 | AARCH64_INS_SQCVTN, |
| 3892 | AARCH64_INS_SQCVTUN, |
| 3893 | AARCH64_INS_SQCVTU, |
| 3894 | AARCH64_INS_SQCVT, |
| 3895 | AARCH64_INS_SQDECB, |
| 3896 | AARCH64_INS_SQDECD, |
| 3897 | AARCH64_INS_SQDECH, |
| 3898 | AARCH64_INS_SQDECP, |
| 3899 | AARCH64_INS_SQDECW, |
| 3900 | AARCH64_INS_SQDMLALBT, |
| 3901 | AARCH64_INS_SQDMLALB, |
| 3902 | AARCH64_INS_SQDMLALT, |
| 3903 | AARCH64_INS_SQDMLAL, |
| 3904 | AARCH64_INS_SQDMLAL2, |
| 3905 | AARCH64_INS_SQDMLSLBT, |
| 3906 | AARCH64_INS_SQDMLSLB, |
| 3907 | AARCH64_INS_SQDMLSLT, |
| 3908 | AARCH64_INS_SQDMLSL, |
| 3909 | AARCH64_INS_SQDMLSL2, |
| 3910 | AARCH64_INS_SQDMULH, |
| 3911 | AARCH64_INS_SQDMULLB, |
| 3912 | AARCH64_INS_SQDMULLT, |
| 3913 | AARCH64_INS_SQDMULL, |
| 3914 | AARCH64_INS_SQDMULL2, |
| 3915 | AARCH64_INS_SQINCB, |
| 3916 | AARCH64_INS_SQINCD, |
| 3917 | AARCH64_INS_SQINCH, |
| 3918 | AARCH64_INS_SQINCP, |
| 3919 | AARCH64_INS_SQINCW, |
| 3920 | AARCH64_INS_SQNEG, |
| 3921 | AARCH64_INS_SQRDCMLAH, |
| 3922 | AARCH64_INS_SQRDMLAH, |
| 3923 | AARCH64_INS_SQRDMLSH, |
| 3924 | AARCH64_INS_SQRDMULH, |
| 3925 | AARCH64_INS_SQRSHLR, |
| 3926 | AARCH64_INS_SQRSHL, |
| 3927 | AARCH64_INS_SQRSHRNB, |
| 3928 | AARCH64_INS_SQRSHRNT, |
| 3929 | AARCH64_INS_SQRSHRN, |
| 3930 | AARCH64_INS_SQRSHRN2, |
| 3931 | AARCH64_INS_SQRSHRUNB, |
| 3932 | AARCH64_INS_SQRSHRUNT, |
| 3933 | AARCH64_INS_SQRSHRUN, |
| 3934 | AARCH64_INS_SQRSHRUN2, |
| 3935 | AARCH64_INS_SQRSHRU, |
| 3936 | AARCH64_INS_SQRSHR, |
| 3937 | AARCH64_INS_SQSHLR, |
| 3938 | AARCH64_INS_SQSHLU, |
| 3939 | AARCH64_INS_SQSHL, |
| 3940 | AARCH64_INS_SQSHRNB, |
| 3941 | AARCH64_INS_SQSHRNT, |
| 3942 | AARCH64_INS_SQSHRN, |
| 3943 | AARCH64_INS_SQSHRN2, |
| 3944 | AARCH64_INS_SQSHRUNB, |
| 3945 | AARCH64_INS_SQSHRUNT, |
| 3946 | AARCH64_INS_SQSHRUN, |
| 3947 | AARCH64_INS_SQSHRUN2, |
| 3948 | AARCH64_INS_SQSUBR, |
| 3949 | AARCH64_INS_SQSUB, |
| 3950 | AARCH64_INS_SQXTNB, |
| 3951 | AARCH64_INS_SQXTNT, |
| 3952 | AARCH64_INS_SQXTN2, |
| 3953 | AARCH64_INS_SQXTN, |
| 3954 | AARCH64_INS_SQXTUNB, |
| 3955 | AARCH64_INS_SQXTUNT, |
| 3956 | AARCH64_INS_SQXTUN2, |
| 3957 | AARCH64_INS_SQXTUN, |
| 3958 | AARCH64_INS_SRHADD, |
| 3959 | AARCH64_INS_SRI, |
| 3960 | AARCH64_INS_SRSHLR, |
| 3961 | AARCH64_INS_SRSHL, |
| 3962 | AARCH64_INS_SRSHR, |
| 3963 | AARCH64_INS_SRSRA, |
| 3964 | AARCH64_INS_SSHLLB, |
| 3965 | AARCH64_INS_SSHLLT, |
| 3966 | AARCH64_INS_SSHLL2, |
| 3967 | AARCH64_INS_SSHLL, |
| 3968 | AARCH64_INS_SSHL, |
| 3969 | AARCH64_INS_SSHR, |
| 3970 | AARCH64_INS_SSRA, |
| 3971 | AARCH64_INS_ST1B, |
| 3972 | AARCH64_INS_ST1D, |
| 3973 | AARCH64_INS_ST1H, |
| 3974 | AARCH64_INS_ST1Q, |
| 3975 | AARCH64_INS_ST1W, |
| 3976 | AARCH64_INS_SSUBLBT, |
| 3977 | AARCH64_INS_SSUBLB, |
| 3978 | AARCH64_INS_SSUBLTB, |
| 3979 | AARCH64_INS_SSUBLT, |
| 3980 | AARCH64_INS_SSUBL2, |
| 3981 | AARCH64_INS_SSUBL, |
| 3982 | AARCH64_INS_SSUBWB, |
| 3983 | AARCH64_INS_SSUBWT, |
| 3984 | AARCH64_INS_SSUBW2, |
| 3985 | AARCH64_INS_SSUBW, |
| 3986 | AARCH64_INS_ST1, |
| 3987 | AARCH64_INS_ST2B, |
| 3988 | AARCH64_INS_ST2D, |
| 3989 | AARCH64_INS_ST2G, |
| 3990 | AARCH64_INS_ST2H, |
| 3991 | AARCH64_INS_ST2Q, |
| 3992 | AARCH64_INS_ST2, |
| 3993 | AARCH64_INS_ST2W, |
| 3994 | AARCH64_INS_ST3B, |
| 3995 | AARCH64_INS_ST3D, |
| 3996 | AARCH64_INS_ST3H, |
| 3997 | AARCH64_INS_ST3Q, |
| 3998 | AARCH64_INS_ST3, |
| 3999 | AARCH64_INS_ST3W, |
| 4000 | AARCH64_INS_ST4B, |
| 4001 | AARCH64_INS_ST4D, |
| 4002 | AARCH64_INS_ST4, |
| 4003 | AARCH64_INS_ST4H, |
| 4004 | AARCH64_INS_ST4Q, |
| 4005 | AARCH64_INS_ST4W, |
| 4006 | AARCH64_INS_ST64B, |
| 4007 | AARCH64_INS_ST64BV, |
| 4008 | AARCH64_INS_ST64BV0, |
| 4009 | AARCH64_INS_STGM, |
| 4010 | AARCH64_INS_STGP, |
| 4011 | AARCH64_INS_STG, |
| 4012 | AARCH64_INS_STILP, |
| 4013 | AARCH64_INS_STL1, |
| 4014 | AARCH64_INS_STLLRB, |
| 4015 | AARCH64_INS_STLLRH, |
| 4016 | AARCH64_INS_STLLR, |
| 4017 | AARCH64_INS_STLRB, |
| 4018 | AARCH64_INS_STLRH, |
| 4019 | AARCH64_INS_STLR, |
| 4020 | AARCH64_INS_STLURB, |
| 4021 | AARCH64_INS_STLURH, |
| 4022 | AARCH64_INS_STLUR, |
| 4023 | AARCH64_INS_STLXP, |
| 4024 | AARCH64_INS_STLXRB, |
| 4025 | AARCH64_INS_STLXRH, |
| 4026 | AARCH64_INS_STLXR, |
| 4027 | AARCH64_INS_STNP, |
| 4028 | AARCH64_INS_STNT1B, |
| 4029 | AARCH64_INS_STNT1D, |
| 4030 | AARCH64_INS_STNT1H, |
| 4031 | AARCH64_INS_STNT1W, |
| 4032 | AARCH64_INS_STP, |
| 4033 | AARCH64_INS_STRB, |
| 4034 | AARCH64_INS_STR, |
| 4035 | AARCH64_INS_STRH, |
| 4036 | AARCH64_INS_STTRB, |
| 4037 | AARCH64_INS_STTRH, |
| 4038 | AARCH64_INS_STTR, |
| 4039 | AARCH64_INS_STURB, |
| 4040 | AARCH64_INS_STUR, |
| 4041 | AARCH64_INS_STURH, |
| 4042 | AARCH64_INS_STXP, |
| 4043 | AARCH64_INS_STXRB, |
| 4044 | AARCH64_INS_STXRH, |
| 4045 | AARCH64_INS_STXR, |
| 4046 | AARCH64_INS_STZ2G, |
| 4047 | AARCH64_INS_STZGM, |
| 4048 | AARCH64_INS_STZG, |
| 4049 | AARCH64_INS_SUBG, |
| 4050 | AARCH64_INS_SUBHNB, |
| 4051 | AARCH64_INS_SUBHNT, |
| 4052 | AARCH64_INS_SUBHN, |
| 4053 | AARCH64_INS_SUBHN2, |
| 4054 | AARCH64_INS_SUBP, |
| 4055 | AARCH64_INS_SUBPS, |
| 4056 | AARCH64_INS_SUBPT, |
| 4057 | AARCH64_INS_SUBR, |
| 4058 | AARCH64_INS_SUBS, |
| 4059 | AARCH64_INS_SUB, |
| 4060 | AARCH64_INS_SUDOT, |
| 4061 | AARCH64_INS_SUMLALL, |
| 4062 | AARCH64_INS_SUMOPA, |
| 4063 | AARCH64_INS_SUMOPS, |
| 4064 | AARCH64_INS_SUNPKHI, |
| 4065 | AARCH64_INS_SUNPKLO, |
| 4066 | AARCH64_INS_SUNPK, |
| 4067 | AARCH64_INS_SUQADD, |
| 4068 | AARCH64_INS_SUVDOT, |
| 4069 | AARCH64_INS_SVC, |
| 4070 | AARCH64_INS_SVDOT, |
| 4071 | AARCH64_INS_SWPAB, |
| 4072 | AARCH64_INS_SWPAH, |
| 4073 | AARCH64_INS_SWPALB, |
| 4074 | AARCH64_INS_SWPALH, |
| 4075 | AARCH64_INS_SWPAL, |
| 4076 | AARCH64_INS_SWPA, |
| 4077 | AARCH64_INS_SWPB, |
| 4078 | AARCH64_INS_SWPH, |
| 4079 | AARCH64_INS_SWPLB, |
| 4080 | AARCH64_INS_SWPLH, |
| 4081 | AARCH64_INS_SWPL, |
| 4082 | AARCH64_INS_SWPP, |
| 4083 | AARCH64_INS_SWPPA, |
| 4084 | AARCH64_INS_SWPPAL, |
| 4085 | AARCH64_INS_SWPPL, |
| 4086 | AARCH64_INS_SWP, |
| 4087 | AARCH64_INS_SXTB, |
| 4088 | AARCH64_INS_SXTH, |
| 4089 | AARCH64_INS_SXTW, |
| 4090 | AARCH64_INS_SYSL, |
| 4091 | AARCH64_INS_SYSP, |
| 4092 | AARCH64_INS_SYS, |
| 4093 | AARCH64_INS_TBLQ, |
| 4094 | AARCH64_INS_TBL, |
| 4095 | AARCH64_INS_TBNZ, |
| 4096 | AARCH64_INS_TBXQ, |
| 4097 | AARCH64_INS_TBX, |
| 4098 | AARCH64_INS_TBZ, |
| 4099 | AARCH64_INS_TCANCEL, |
| 4100 | AARCH64_INS_TCOMMIT, |
| 4101 | AARCH64_INS_TRCIT, |
| 4102 | AARCH64_INS_TRN1, |
| 4103 | AARCH64_INS_TRN2, |
| 4104 | AARCH64_INS_TSB, |
| 4105 | AARCH64_INS_TSTART, |
| 4106 | AARCH64_INS_TTEST, |
| 4107 | AARCH64_INS_UABALB, |
| 4108 | AARCH64_INS_UABALT, |
| 4109 | AARCH64_INS_UABAL2, |
| 4110 | AARCH64_INS_UABAL, |
| 4111 | AARCH64_INS_UABA, |
| 4112 | AARCH64_INS_UABDLB, |
| 4113 | AARCH64_INS_UABDLT, |
| 4114 | AARCH64_INS_UABDL2, |
| 4115 | AARCH64_INS_UABDL, |
| 4116 | AARCH64_INS_UABD, |
| 4117 | AARCH64_INS_UADALP, |
| 4118 | AARCH64_INS_UADDLB, |
| 4119 | AARCH64_INS_UADDLP, |
| 4120 | AARCH64_INS_UADDLT, |
| 4121 | AARCH64_INS_UADDLV, |
| 4122 | AARCH64_INS_UADDL2, |
| 4123 | AARCH64_INS_UADDL, |
| 4124 | AARCH64_INS_UADDV, |
| 4125 | AARCH64_INS_UADDWB, |
| 4126 | AARCH64_INS_UADDWT, |
| 4127 | AARCH64_INS_UADDW2, |
| 4128 | AARCH64_INS_UADDW, |
| 4129 | AARCH64_INS_UBFM, |
| 4130 | AARCH64_INS_UCLAMP, |
| 4131 | AARCH64_INS_UCVTF, |
| 4132 | AARCH64_INS_UDF, |
| 4133 | AARCH64_INS_UDIVR, |
| 4134 | AARCH64_INS_UDIV, |
| 4135 | AARCH64_INS_UDOT, |
| 4136 | AARCH64_INS_UHADD, |
| 4137 | AARCH64_INS_UHSUBR, |
| 4138 | AARCH64_INS_UHSUB, |
| 4139 | AARCH64_INS_UMADDL, |
| 4140 | AARCH64_INS_UMAXP, |
| 4141 | AARCH64_INS_UMAXQV, |
| 4142 | AARCH64_INS_UMAXV, |
| 4143 | AARCH64_INS_UMAX, |
| 4144 | AARCH64_INS_UMINP, |
| 4145 | AARCH64_INS_UMINQV, |
| 4146 | AARCH64_INS_UMINV, |
| 4147 | AARCH64_INS_UMIN, |
| 4148 | AARCH64_INS_UMLALB, |
| 4149 | AARCH64_INS_UMLALL, |
| 4150 | AARCH64_INS_UMLALT, |
| 4151 | AARCH64_INS_UMLAL, |
| 4152 | AARCH64_INS_UMLAL2, |
| 4153 | AARCH64_INS_UMLSLB, |
| 4154 | AARCH64_INS_UMLSLL, |
| 4155 | AARCH64_INS_UMLSLT, |
| 4156 | AARCH64_INS_UMLSL, |
| 4157 | AARCH64_INS_UMLSL2, |
| 4158 | AARCH64_INS_UMMLA, |
| 4159 | AARCH64_INS_UMOPA, |
| 4160 | AARCH64_INS_UMOPS, |
| 4161 | AARCH64_INS_UMOV, |
| 4162 | AARCH64_INS_UMSUBL, |
| 4163 | AARCH64_INS_UMULH, |
| 4164 | AARCH64_INS_UMULLB, |
| 4165 | AARCH64_INS_UMULLT, |
| 4166 | AARCH64_INS_UMULL2, |
| 4167 | AARCH64_INS_UMULL, |
| 4168 | AARCH64_INS_UQADD, |
| 4169 | AARCH64_INS_UQCVTN, |
| 4170 | AARCH64_INS_UQCVT, |
| 4171 | AARCH64_INS_UQDECB, |
| 4172 | AARCH64_INS_UQDECD, |
| 4173 | AARCH64_INS_UQDECH, |
| 4174 | AARCH64_INS_UQDECP, |
| 4175 | AARCH64_INS_UQDECW, |
| 4176 | AARCH64_INS_UQINCB, |
| 4177 | AARCH64_INS_UQINCD, |
| 4178 | AARCH64_INS_UQINCH, |
| 4179 | AARCH64_INS_UQINCP, |
| 4180 | AARCH64_INS_UQINCW, |
| 4181 | AARCH64_INS_UQRSHLR, |
| 4182 | AARCH64_INS_UQRSHL, |
| 4183 | AARCH64_INS_UQRSHRNB, |
| 4184 | AARCH64_INS_UQRSHRNT, |
| 4185 | AARCH64_INS_UQRSHRN, |
| 4186 | AARCH64_INS_UQRSHRN2, |
| 4187 | AARCH64_INS_UQRSHR, |
| 4188 | AARCH64_INS_UQSHLR, |
| 4189 | AARCH64_INS_UQSHL, |
| 4190 | AARCH64_INS_UQSHRNB, |
| 4191 | AARCH64_INS_UQSHRNT, |
| 4192 | AARCH64_INS_UQSHRN, |
| 4193 | AARCH64_INS_UQSHRN2, |
| 4194 | AARCH64_INS_UQSUBR, |
| 4195 | AARCH64_INS_UQSUB, |
| 4196 | AARCH64_INS_UQXTNB, |
| 4197 | AARCH64_INS_UQXTNT, |
| 4198 | AARCH64_INS_UQXTN2, |
| 4199 | AARCH64_INS_UQXTN, |
| 4200 | AARCH64_INS_URECPE, |
| 4201 | AARCH64_INS_URHADD, |
| 4202 | AARCH64_INS_URSHLR, |
| 4203 | AARCH64_INS_URSHL, |
| 4204 | AARCH64_INS_URSHR, |
| 4205 | AARCH64_INS_URSQRTE, |
| 4206 | AARCH64_INS_URSRA, |
| 4207 | AARCH64_INS_USDOT, |
| 4208 | AARCH64_INS_USHLLB, |
| 4209 | AARCH64_INS_USHLLT, |
| 4210 | AARCH64_INS_USHLL2, |
| 4211 | AARCH64_INS_USHLL, |
| 4212 | AARCH64_INS_USHL, |
| 4213 | AARCH64_INS_USHR, |
| 4214 | AARCH64_INS_USMLALL, |
| 4215 | AARCH64_INS_USMMLA, |
| 4216 | AARCH64_INS_USMOPA, |
| 4217 | AARCH64_INS_USMOPS, |
| 4218 | AARCH64_INS_USQADD, |
| 4219 | AARCH64_INS_USRA, |
| 4220 | AARCH64_INS_USUBLB, |
| 4221 | AARCH64_INS_USUBLT, |
| 4222 | AARCH64_INS_USUBL2, |
| 4223 | AARCH64_INS_USUBL, |
| 4224 | AARCH64_INS_USUBWB, |
| 4225 | AARCH64_INS_USUBWT, |
| 4226 | AARCH64_INS_USUBW2, |
| 4227 | AARCH64_INS_USUBW, |
| 4228 | AARCH64_INS_USVDOT, |
| 4229 | AARCH64_INS_UUNPKHI, |
| 4230 | AARCH64_INS_UUNPKLO, |
| 4231 | AARCH64_INS_UUNPK, |
| 4232 | AARCH64_INS_UVDOT, |
| 4233 | AARCH64_INS_UXTB, |
| 4234 | AARCH64_INS_UXTH, |
| 4235 | AARCH64_INS_UXTW, |
| 4236 | AARCH64_INS_UZP1, |
| 4237 | AARCH64_INS_UZP2, |
| 4238 | AARCH64_INS_UZPQ1, |
| 4239 | AARCH64_INS_UZPQ2, |
| 4240 | AARCH64_INS_UZP, |
| 4241 | AARCH64_INS_WFET, |
| 4242 | AARCH64_INS_WFIT, |
| 4243 | AARCH64_INS_WHILEGE, |
| 4244 | AARCH64_INS_WHILEGT, |
| 4245 | AARCH64_INS_WHILEHI, |
| 4246 | AARCH64_INS_WHILEHS, |
| 4247 | AARCH64_INS_WHILELE, |
| 4248 | AARCH64_INS_WHILELO, |
| 4249 | AARCH64_INS_WHILELS, |
| 4250 | AARCH64_INS_WHILELT, |
| 4251 | AARCH64_INS_WHILERW, |
| 4252 | AARCH64_INS_WHILEWR, |
| 4253 | AARCH64_INS_WRFFR, |
| 4254 | AARCH64_INS_XAFLAG, |
| 4255 | AARCH64_INS_XAR, |
| 4256 | AARCH64_INS_XPACD, |
| 4257 | AARCH64_INS_XPACI, |
| 4258 | AARCH64_INS_XTN2, |
| 4259 | AARCH64_INS_XTN, |
| 4260 | AARCH64_INS_ZERO, |
| 4261 | AARCH64_INS_ZIP1, |
| 4262 | AARCH64_INS_ZIP2, |
| 4263 | AARCH64_INS_ZIPQ1, |
| 4264 | AARCH64_INS_ZIPQ2, |
| 4265 | AARCH64_INS_ZIP, |
| 4266 | |
| 4267 | // clang-format on |
| 4268 | // generated content <AArch64GenCSInsnEnum.inc> end |
| 4269 | |
| 4270 | AARCH64_INS_ENDING, // <-- mark the end of the list of insn |
| 4271 | |
| 4272 | AARCH64_INS_ALIAS_BEGIN, |
| 4273 | // generated content <AArch64GenCSAliasEnum.inc> begin |
| 4274 | // clang-format off |
| 4275 | |
| 4276 | AARCH64_INS_ALIAS_ADDPT, // Real instr.: AARCH64_ADDPT_shift |
| 4277 | AARCH64_INS_ALIAS_GCSB, // Real instr.: AARCH64_HINT |
| 4278 | AARCH64_INS_ALIAS_GCSPOPM, // Real instr.: AARCH64_GCSPOPM |
| 4279 | AARCH64_INS_ALIAS_LDAPUR, // Real instr.: AARCH64_LDAPURbi |
| 4280 | AARCH64_INS_ALIAS_STLLRB, // Real instr.: AARCH64_STLLRB |
| 4281 | AARCH64_INS_ALIAS_STLLRH, // Real instr.: AARCH64_STLLRH |
| 4282 | AARCH64_INS_ALIAS_STLLR, // Real instr.: AARCH64_STLLRW |
| 4283 | AARCH64_INS_ALIAS_STLRB, // Real instr.: AARCH64_STLRB |
| 4284 | AARCH64_INS_ALIAS_STLRH, // Real instr.: AARCH64_STLRH |
| 4285 | AARCH64_INS_ALIAS_STLR, // Real instr.: AARCH64_STLRW |
| 4286 | AARCH64_INS_ALIAS_STLUR, // Real instr.: AARCH64_STLURbi |
| 4287 | AARCH64_INS_ALIAS_SUBPT, // Real instr.: AARCH64_SUBPT_shift |
| 4288 | AARCH64_INS_ALIAS_LDRAA, // Real instr.: AARCH64_LDRAAindexed |
| 4289 | AARCH64_INS_ALIAS_ADD, // Real instr.: AARCH64_ADDWrs |
| 4290 | AARCH64_INS_ALIAS_CMN, // Real instr.: AARCH64_ADDSWri |
| 4291 | AARCH64_INS_ALIAS_ADDS, // Real instr.: AARCH64_ADDSWrs |
| 4292 | AARCH64_INS_ALIAS_AND, // Real instr.: AARCH64_ANDWrs |
| 4293 | AARCH64_INS_ALIAS_ANDS, // Real instr.: AARCH64_ANDSWrs |
| 4294 | AARCH64_INS_ALIAS_LDR, // Real instr.: AARCH64_LDRXui |
| 4295 | AARCH64_INS_ALIAS_STR, // Real instr.: AARCH64_STRBui |
| 4296 | AARCH64_INS_ALIAS_LDRB, // Real instr.: AARCH64_LDRBBroX |
| 4297 | AARCH64_INS_ALIAS_STRB, // Real instr.: AARCH64_STRBBroX |
| 4298 | AARCH64_INS_ALIAS_LDRH, // Real instr.: AARCH64_LDRHHroX |
| 4299 | AARCH64_INS_ALIAS_STRH, // Real instr.: AARCH64_STRHHroX |
| 4300 | AARCH64_INS_ALIAS_PRFM, // Real instr.: AARCH64_PRFMroX |
| 4301 | AARCH64_INS_ALIAS_LDAPURB, // Real instr.: AARCH64_LDAPURBi |
| 4302 | AARCH64_INS_ALIAS_STLURB, // Real instr.: AARCH64_STLURBi |
| 4303 | AARCH64_INS_ALIAS_LDUR, // Real instr.: AARCH64_LDURXi |
| 4304 | AARCH64_INS_ALIAS_STUR, // Real instr.: AARCH64_STURXi |
| 4305 | AARCH64_INS_ALIAS_PRFUM, // Real instr.: AARCH64_PRFUMi |
| 4306 | AARCH64_INS_ALIAS_LDTR, // Real instr.: AARCH64_LDTRXi |
| 4307 | AARCH64_INS_ALIAS_STTR, // Real instr.: AARCH64_STTRWi |
| 4308 | AARCH64_INS_ALIAS_LDP, // Real instr.: AARCH64_LDPWi |
| 4309 | AARCH64_INS_ALIAS_STGP, // Real instr.: AARCH64_STGPi |
| 4310 | AARCH64_INS_ALIAS_LDNP, // Real instr.: AARCH64_LDNPWi |
| 4311 | AARCH64_INS_ALIAS_STNP, // Real instr.: AARCH64_STNPWi |
| 4312 | AARCH64_INS_ALIAS_STG, // Real instr.: AARCH64_STGi |
| 4313 | AARCH64_INS_ALIAS_MOV, // Real instr.: AARCH64_UMOVvi32_idx0 |
| 4314 | AARCH64_INS_ALIAS_LD1, // Real instr.: AARCH64_LD1Onev16b_POST |
| 4315 | AARCH64_INS_ALIAS_LD1R, // Real instr.: AARCH64_LD1Rv8b_POST |
| 4316 | AARCH64_INS_ALIAS_STADDLB, // Real instr.: AARCH64_LDADDLB |
| 4317 | AARCH64_INS_ALIAS_STADDLH, // Real instr.: AARCH64_LDADDLH |
| 4318 | AARCH64_INS_ALIAS_STADDL, // Real instr.: AARCH64_LDADDLW |
| 4319 | AARCH64_INS_ALIAS_STADDB, // Real instr.: AARCH64_LDADDB |
| 4320 | AARCH64_INS_ALIAS_STADDH, // Real instr.: AARCH64_LDADDH |
| 4321 | AARCH64_INS_ALIAS_STADD, // Real instr.: AARCH64_LDADDW |
| 4322 | AARCH64_INS_ALIAS_PTRUE, // Real instr.: AARCH64_PTRUE_B |
| 4323 | AARCH64_INS_ALIAS_PTRUES, // Real instr.: AARCH64_PTRUES_B |
| 4324 | AARCH64_INS_ALIAS_CNTB, // Real instr.: AARCH64_CNTB_XPiI |
| 4325 | AARCH64_INS_ALIAS_SQINCH, // Real instr.: AARCH64_SQINCH_ZPiI |
| 4326 | AARCH64_INS_ALIAS_INCB, // Real instr.: AARCH64_INCB_XPiI |
| 4327 | AARCH64_INS_ALIAS_SQINCB, // Real instr.: AARCH64_SQINCB_XPiWdI |
| 4328 | AARCH64_INS_ALIAS_UQINCB, // Real instr.: AARCH64_UQINCB_WPiI |
| 4329 | AARCH64_INS_ALIAS_ORR, // Real instr.: AARCH64_ORR_ZI |
| 4330 | AARCH64_INS_ALIAS_DUPM, // Real instr.: AARCH64_DUPM_ZI |
| 4331 | AARCH64_INS_ALIAS_FMOV, // Real instr.: AARCH64_DUP_ZI_H |
| 4332 | AARCH64_INS_ALIAS_EOR3, // Real instr.: AARCH64_EOR3_ZZZZ |
| 4333 | AARCH64_INS_ALIAS_ST1B, // Real instr.: AARCH64_ST1B_IMM |
| 4334 | AARCH64_INS_ALIAS_ST2B, // Real instr.: AARCH64_ST2B_IMM |
| 4335 | AARCH64_INS_ALIAS_ST2Q, // Real instr.: AARCH64_ST2Q_IMM |
| 4336 | AARCH64_INS_ALIAS_STNT1B, // Real instr.: AARCH64_STNT1B_ZRI |
| 4337 | AARCH64_INS_ALIAS_LD1B, // Real instr.: AARCH64_LD1B_IMM |
| 4338 | AARCH64_INS_ALIAS_LDNT1B, // Real instr.: AARCH64_LDNT1B_ZRI |
| 4339 | AARCH64_INS_ALIAS_LD1RQB, // Real instr.: AARCH64_LD1RQ_B_IMM |
| 4340 | AARCH64_INS_ALIAS_LD1RB, // Real instr.: AARCH64_LD1RB_IMM |
| 4341 | AARCH64_INS_ALIAS_LDFF1B, // Real instr.: AARCH64_LDFF1B_REAL |
| 4342 | AARCH64_INS_ALIAS_LDNF1B, // Real instr.: AARCH64_LDNF1B_IMM_REAL |
| 4343 | AARCH64_INS_ALIAS_LD2B, // Real instr.: AARCH64_LD2B_IMM |
| 4344 | AARCH64_INS_ALIAS_LD1SB, // Real instr.: AARCH64_GLD1SB_S_IMM_REAL |
| 4345 | AARCH64_INS_ALIAS_PRFB, // Real instr.: AARCH64_PRFB_PRI |
| 4346 | AARCH64_INS_ALIAS_LDNT1SB, // Real instr.: AARCH64_LDNT1SB_ZZR_S_REAL |
| 4347 | AARCH64_INS_ALIAS_LD1ROB, // Real instr.: AARCH64_LD1RO_B_IMM |
| 4348 | AARCH64_INS_ALIAS_LD1Q, // Real instr.: AARCH64_GLD1Q |
| 4349 | AARCH64_INS_ALIAS_ST1Q, // Real instr.: AARCH64_SST1Q |
| 4350 | AARCH64_INS_ALIAS_LD1W, // Real instr.: AARCH64_LD1W_Q_IMM |
| 4351 | AARCH64_INS_ALIAS_PMOV, // Real instr.: AARCH64_PMOV_PZI_B |
| 4352 | AARCH64_INS_ALIAS_SMSTART, // Real instr.: AARCH64_MSRpstatesvcrImm1 |
| 4353 | AARCH64_INS_ALIAS_SMSTOP, // Real instr.: AARCH64_MSRpstatesvcrImm1 |
| 4354 | AARCH64_INS_ALIAS_ZERO, // Real instr.: AARCH64_ZERO_M |
| 4355 | AARCH64_INS_ALIAS_MOVT, // Real instr.: AARCH64_MOVT |
| 4356 | AARCH64_INS_ALIAS_NOP, // Real instr.: AARCH64_HINT |
| 4357 | AARCH64_INS_ALIAS_YIELD, // Real instr.: AARCH64_HINT |
| 4358 | AARCH64_INS_ALIAS_WFE, // Real instr.: AARCH64_HINT |
| 4359 | AARCH64_INS_ALIAS_WFI, // Real instr.: AARCH64_HINT |
| 4360 | AARCH64_INS_ALIAS_SEV, // Real instr.: AARCH64_HINT |
| 4361 | AARCH64_INS_ALIAS_SEVL, // Real instr.: AARCH64_HINT |
| 4362 | AARCH64_INS_ALIAS_DGH, // Real instr.: AARCH64_HINT |
| 4363 | AARCH64_INS_ALIAS_ESB, // Real instr.: AARCH64_HINT |
| 4364 | AARCH64_INS_ALIAS_CSDB, // Real instr.: AARCH64_HINT |
| 4365 | AARCH64_INS_ALIAS_BTI, // Real instr.: AARCH64_HINT |
| 4366 | AARCH64_INS_ALIAS_PSB, // Real instr.: AARCH64_HINT |
| 4367 | AARCH64_INS_ALIAS_CHKFEAT, // Real instr.: AARCH64_CHKFEAT |
| 4368 | AARCH64_INS_ALIAS_PACIAZ, // Real instr.: AARCH64_PACIAZ |
| 4369 | AARCH64_INS_ALIAS_PACIBZ, // Real instr.: AARCH64_PACIBZ |
| 4370 | AARCH64_INS_ALIAS_AUTIAZ, // Real instr.: AARCH64_AUTIAZ |
| 4371 | AARCH64_INS_ALIAS_AUTIBZ, // Real instr.: AARCH64_AUTIBZ |
| 4372 | AARCH64_INS_ALIAS_PACIASP, // Real instr.: AARCH64_PACIASP |
| 4373 | AARCH64_INS_ALIAS_PACIBSP, // Real instr.: AARCH64_PACIBSP |
| 4374 | AARCH64_INS_ALIAS_AUTIASP, // Real instr.: AARCH64_AUTIASP |
| 4375 | AARCH64_INS_ALIAS_AUTIBSP, // Real instr.: AARCH64_AUTIBSP |
| 4376 | AARCH64_INS_ALIAS_PACIA1716, // Real instr.: AARCH64_PACIA1716 |
| 4377 | AARCH64_INS_ALIAS_PACIB1716, // Real instr.: AARCH64_PACIB1716 |
| 4378 | AARCH64_INS_ALIAS_AUTIA1716, // Real instr.: AARCH64_AUTIA1716 |
| 4379 | AARCH64_INS_ALIAS_AUTIB1716, // Real instr.: AARCH64_AUTIB1716 |
| 4380 | AARCH64_INS_ALIAS_XPACLRI, // Real instr.: AARCH64_XPACLRI |
| 4381 | AARCH64_INS_ALIAS_LDRAB, // Real instr.: AARCH64_LDRABindexed |
| 4382 | AARCH64_INS_ALIAS_PACM, // Real instr.: AARCH64_PACM |
| 4383 | AARCH64_INS_ALIAS_CLREX, // Real instr.: AARCH64_CLREX |
| 4384 | AARCH64_INS_ALIAS_ISB, // Real instr.: AARCH64_ISB |
| 4385 | AARCH64_INS_ALIAS_SSBB, // Real instr.: AARCH64_DSB |
| 4386 | AARCH64_INS_ALIAS_PSSBB, // Real instr.: AARCH64_DSB |
| 4387 | AARCH64_INS_ALIAS_DFB, // Real instr.: AARCH64_DSB |
| 4388 | AARCH64_INS_ALIAS_SYS, // Real instr.: AARCH64_SYSxt |
| 4389 | AARCH64_INS_ALIAS_MOVN, // Real instr.: AARCH64_MOVNWi |
| 4390 | AARCH64_INS_ALIAS_MOVZ, // Real instr.: AARCH64_MOVZWi |
| 4391 | AARCH64_INS_ALIAS_NGC, // Real instr.: AARCH64_SBCWr |
| 4392 | AARCH64_INS_ALIAS_NGCS, // Real instr.: AARCH64_SBCSWr |
| 4393 | AARCH64_INS_ALIAS_SUB, // Real instr.: AARCH64_SUBWrs |
| 4394 | AARCH64_INS_ALIAS_CMP, // Real instr.: AARCH64_SUBSWri |
| 4395 | AARCH64_INS_ALIAS_SUBS, // Real instr.: AARCH64_SUBSWrs |
| 4396 | AARCH64_INS_ALIAS_NEG, // Real instr.: AARCH64_SUBWrs |
| 4397 | AARCH64_INS_ALIAS_NEGS, // Real instr.: AARCH64_SUBSWrs |
| 4398 | AARCH64_INS_ALIAS_MUL, // Real instr.: AARCH64_MADDWrrr |
| 4399 | AARCH64_INS_ALIAS_MNEG, // Real instr.: AARCH64_MSUBWrrr |
| 4400 | AARCH64_INS_ALIAS_SMULL, // Real instr.: AARCH64_SMADDLrrr |
| 4401 | AARCH64_INS_ALIAS_SMNEGL, // Real instr.: AARCH64_SMSUBLrrr |
| 4402 | AARCH64_INS_ALIAS_UMULL, // Real instr.: AARCH64_UMADDLrrr |
| 4403 | AARCH64_INS_ALIAS_UMNEGL, // Real instr.: AARCH64_UMSUBLrrr |
| 4404 | AARCH64_INS_ALIAS_STCLRLB, // Real instr.: AARCH64_LDCLRLB |
| 4405 | AARCH64_INS_ALIAS_STCLRLH, // Real instr.: AARCH64_LDCLRLH |
| 4406 | AARCH64_INS_ALIAS_STCLRL, // Real instr.: AARCH64_LDCLRLW |
| 4407 | AARCH64_INS_ALIAS_STCLRB, // Real instr.: AARCH64_LDCLRB |
| 4408 | AARCH64_INS_ALIAS_STCLRH, // Real instr.: AARCH64_LDCLRH |
| 4409 | AARCH64_INS_ALIAS_STCLR, // Real instr.: AARCH64_LDCLRW |
| 4410 | AARCH64_INS_ALIAS_STEORLB, // Real instr.: AARCH64_LDEORLB |
| 4411 | AARCH64_INS_ALIAS_STEORLH, // Real instr.: AARCH64_LDEORLH |
| 4412 | AARCH64_INS_ALIAS_STEORL, // Real instr.: AARCH64_LDEORLW |
| 4413 | AARCH64_INS_ALIAS_STEORB, // Real instr.: AARCH64_LDEORB |
| 4414 | AARCH64_INS_ALIAS_STEORH, // Real instr.: AARCH64_LDEORH |
| 4415 | AARCH64_INS_ALIAS_STEOR, // Real instr.: AARCH64_LDEORW |
| 4416 | AARCH64_INS_ALIAS_STSETLB, // Real instr.: AARCH64_LDSETLB |
| 4417 | AARCH64_INS_ALIAS_STSETLH, // Real instr.: AARCH64_LDSETLH |
| 4418 | AARCH64_INS_ALIAS_STSETL, // Real instr.: AARCH64_LDSETLW |
| 4419 | AARCH64_INS_ALIAS_STSETB, // Real instr.: AARCH64_LDSETB |
| 4420 | AARCH64_INS_ALIAS_STSETH, // Real instr.: AARCH64_LDSETH |
| 4421 | AARCH64_INS_ALIAS_STSET, // Real instr.: AARCH64_LDSETW |
| 4422 | AARCH64_INS_ALIAS_STSMAXLB, // Real instr.: AARCH64_LDSMAXLB |
| 4423 | AARCH64_INS_ALIAS_STSMAXLH, // Real instr.: AARCH64_LDSMAXLH |
| 4424 | AARCH64_INS_ALIAS_STSMAXL, // Real instr.: AARCH64_LDSMAXLW |
| 4425 | AARCH64_INS_ALIAS_STSMAXB, // Real instr.: AARCH64_LDSMAXB |
| 4426 | AARCH64_INS_ALIAS_STSMAXH, // Real instr.: AARCH64_LDSMAXH |
| 4427 | AARCH64_INS_ALIAS_STSMAX, // Real instr.: AARCH64_LDSMAXW |
| 4428 | AARCH64_INS_ALIAS_STSMINLB, // Real instr.: AARCH64_LDSMINLB |
| 4429 | AARCH64_INS_ALIAS_STSMINLH, // Real instr.: AARCH64_LDSMINLH |
| 4430 | AARCH64_INS_ALIAS_STSMINL, // Real instr.: AARCH64_LDSMINLW |
| 4431 | AARCH64_INS_ALIAS_STSMINB, // Real instr.: AARCH64_LDSMINB |
| 4432 | AARCH64_INS_ALIAS_STSMINH, // Real instr.: AARCH64_LDSMINH |
| 4433 | AARCH64_INS_ALIAS_STSMIN, // Real instr.: AARCH64_LDSMINW |
| 4434 | AARCH64_INS_ALIAS_STUMAXLB, // Real instr.: AARCH64_LDUMAXLB |
| 4435 | AARCH64_INS_ALIAS_STUMAXLH, // Real instr.: AARCH64_LDUMAXLH |
| 4436 | AARCH64_INS_ALIAS_STUMAXL, // Real instr.: AARCH64_LDUMAXLW |
| 4437 | AARCH64_INS_ALIAS_STUMAXB, // Real instr.: AARCH64_LDUMAXB |
| 4438 | AARCH64_INS_ALIAS_STUMAXH, // Real instr.: AARCH64_LDUMAXH |
| 4439 | AARCH64_INS_ALIAS_STUMAX, // Real instr.: AARCH64_LDUMAXW |
| 4440 | AARCH64_INS_ALIAS_STUMINLB, // Real instr.: AARCH64_LDUMINLB |
| 4441 | AARCH64_INS_ALIAS_STUMINLH, // Real instr.: AARCH64_LDUMINLH |
| 4442 | AARCH64_INS_ALIAS_STUMINL, // Real instr.: AARCH64_LDUMINLW |
| 4443 | AARCH64_INS_ALIAS_STUMINB, // Real instr.: AARCH64_LDUMINB |
| 4444 | AARCH64_INS_ALIAS_STUMINH, // Real instr.: AARCH64_LDUMINH |
| 4445 | AARCH64_INS_ALIAS_STUMIN, // Real instr.: AARCH64_LDUMINW |
| 4446 | AARCH64_INS_ALIAS_IRG, // Real instr.: AARCH64_IRG |
| 4447 | AARCH64_INS_ALIAS_LDG, // Real instr.: AARCH64_LDG |
| 4448 | AARCH64_INS_ALIAS_STZG, // Real instr.: AARCH64_STZGi |
| 4449 | AARCH64_INS_ALIAS_ST2G, // Real instr.: AARCH64_ST2Gi |
| 4450 | AARCH64_INS_ALIAS_STZ2G, // Real instr.: AARCH64_STZ2Gi |
| 4451 | AARCH64_INS_ALIAS_BICS, // Real instr.: AARCH64_BICSWrs |
| 4452 | AARCH64_INS_ALIAS_BIC, // Real instr.: AARCH64_BICWrs |
| 4453 | AARCH64_INS_ALIAS_EON, // Real instr.: AARCH64_EONWrs |
| 4454 | AARCH64_INS_ALIAS_EOR, // Real instr.: AARCH64_EORWrs |
| 4455 | AARCH64_INS_ALIAS_ORN, // Real instr.: AARCH64_ORNWrs |
| 4456 | AARCH64_INS_ALIAS_MVN, // Real instr.: AARCH64_ORNWrs |
| 4457 | AARCH64_INS_ALIAS_TST, // Real instr.: AARCH64_ANDSWri |
| 4458 | AARCH64_INS_ALIAS_ROR, // Real instr.: AARCH64_EXTRWrri |
| 4459 | AARCH64_INS_ALIAS_ASR, // Real instr.: AARCH64_SBFMWri |
| 4460 | AARCH64_INS_ALIAS_SXTB, // Real instr.: AARCH64_SBFMWri |
| 4461 | AARCH64_INS_ALIAS_SXTH, // Real instr.: AARCH64_SBFMWri |
| 4462 | AARCH64_INS_ALIAS_SXTW, // Real instr.: AARCH64_SBFMXri |
| 4463 | AARCH64_INS_ALIAS_LSR, // Real instr.: AARCH64_UBFMWri |
| 4464 | AARCH64_INS_ALIAS_UXTB, // Real instr.: AARCH64_UBFMWri |
| 4465 | AARCH64_INS_ALIAS_UXTH, // Real instr.: AARCH64_UBFMWri |
| 4466 | AARCH64_INS_ALIAS_UXTW, // Real instr.: AARCH64_UBFMXri |
| 4467 | AARCH64_INS_ALIAS_CSET, // Real instr.: AARCH64_CSINCWr |
| 4468 | AARCH64_INS_ALIAS_CSETM, // Real instr.: AARCH64_CSINVWr |
| 4469 | AARCH64_INS_ALIAS_CINC, // Real instr.: AARCH64_CSINCWr |
| 4470 | AARCH64_INS_ALIAS_CINV, // Real instr.: AARCH64_CSINVWr |
| 4471 | AARCH64_INS_ALIAS_CNEG, // Real instr.: AARCH64_CSNEGWr |
| 4472 | AARCH64_INS_ALIAS_RET, // Real instr.: AARCH64_RET |
| 4473 | AARCH64_INS_ALIAS_DCPS1, // Real instr.: AARCH64_DCPS1 |
| 4474 | AARCH64_INS_ALIAS_DCPS2, // Real instr.: AARCH64_DCPS2 |
| 4475 | AARCH64_INS_ALIAS_DCPS3, // Real instr.: AARCH64_DCPS3 |
| 4476 | AARCH64_INS_ALIAS_LDPSW, // Real instr.: AARCH64_LDPSWi |
| 4477 | AARCH64_INS_ALIAS_LDRSH, // Real instr.: AARCH64_LDRSHWroX |
| 4478 | AARCH64_INS_ALIAS_LDRSB, // Real instr.: AARCH64_LDRSBWroX |
| 4479 | AARCH64_INS_ALIAS_LDRSW, // Real instr.: AARCH64_LDRSWroX |
| 4480 | AARCH64_INS_ALIAS_LDURH, // Real instr.: AARCH64_LDURHHi |
| 4481 | AARCH64_INS_ALIAS_LDURB, // Real instr.: AARCH64_LDURBBi |
| 4482 | AARCH64_INS_ALIAS_LDURSH, // Real instr.: AARCH64_LDURSHWi |
| 4483 | AARCH64_INS_ALIAS_LDURSB, // Real instr.: AARCH64_LDURSBWi |
| 4484 | AARCH64_INS_ALIAS_LDURSW, // Real instr.: AARCH64_LDURSWi |
| 4485 | AARCH64_INS_ALIAS_LDTRH, // Real instr.: AARCH64_LDTRHi |
| 4486 | AARCH64_INS_ALIAS_LDTRB, // Real instr.: AARCH64_LDTRBi |
| 4487 | AARCH64_INS_ALIAS_LDTRSH, // Real instr.: AARCH64_LDTRSHWi |
| 4488 | AARCH64_INS_ALIAS_LDTRSB, // Real instr.: AARCH64_LDTRSBWi |
| 4489 | AARCH64_INS_ALIAS_LDTRSW, // Real instr.: AARCH64_LDTRSWi |
| 4490 | AARCH64_INS_ALIAS_STP, // Real instr.: AARCH64_STPWi |
| 4491 | AARCH64_INS_ALIAS_STURH, // Real instr.: AARCH64_STURHHi |
| 4492 | AARCH64_INS_ALIAS_STURB, // Real instr.: AARCH64_STURBBi |
| 4493 | AARCH64_INS_ALIAS_STLURH, // Real instr.: AARCH64_STLURHi |
| 4494 | AARCH64_INS_ALIAS_LDAPURSB, // Real instr.: AARCH64_LDAPURSBWi |
| 4495 | AARCH64_INS_ALIAS_LDAPURH, // Real instr.: AARCH64_LDAPURHi |
| 4496 | AARCH64_INS_ALIAS_LDAPURSH, // Real instr.: AARCH64_LDAPURSHWi |
| 4497 | AARCH64_INS_ALIAS_LDAPURSW, // Real instr.: AARCH64_LDAPURSWi |
| 4498 | AARCH64_INS_ALIAS_STTRH, // Real instr.: AARCH64_STTRHi |
| 4499 | AARCH64_INS_ALIAS_STTRB, // Real instr.: AARCH64_STTRBi |
| 4500 | AARCH64_INS_ALIAS_BIC_4H, // Real instr.: AARCH64_BICv4i16 |
| 4501 | AARCH64_INS_ALIAS_BIC_8H, // Real instr.: AARCH64_BICv8i16 |
| 4502 | AARCH64_INS_ALIAS_BIC_2S, // Real instr.: AARCH64_BICv2i32 |
| 4503 | AARCH64_INS_ALIAS_BIC_4S, // Real instr.: AARCH64_BICv4i32 |
| 4504 | AARCH64_INS_ALIAS_ORR_4H, // Real instr.: AARCH64_ORRv4i16 |
| 4505 | AARCH64_INS_ALIAS_ORR_8H, // Real instr.: AARCH64_ORRv8i16 |
| 4506 | AARCH64_INS_ALIAS_ORR_2S, // Real instr.: AARCH64_ORRv2i32 |
| 4507 | AARCH64_INS_ALIAS_ORR_4S, // Real instr.: AARCH64_ORRv4i32 |
| 4508 | AARCH64_INS_ALIAS_SXTL_8H, // Real instr.: AARCH64_SSHLLv8i8_shift |
| 4509 | AARCH64_INS_ALIAS_SXTL, // Real instr.: AARCH64_SSHLLv8i8_shift |
| 4510 | AARCH64_INS_ALIAS_SXTL_4S, // Real instr.: AARCH64_SSHLLv4i16_shift |
| 4511 | AARCH64_INS_ALIAS_SXTL_2D, // Real instr.: AARCH64_SSHLLv2i32_shift |
| 4512 | AARCH64_INS_ALIAS_SXTL2_8H, // Real instr.: AARCH64_SSHLLv16i8_shift |
| 4513 | AARCH64_INS_ALIAS_SXTL2, // Real instr.: AARCH64_SSHLLv16i8_shift |
| 4514 | AARCH64_INS_ALIAS_SXTL2_4S, // Real instr.: AARCH64_SSHLLv8i16_shift |
| 4515 | AARCH64_INS_ALIAS_SXTL2_2D, // Real instr.: AARCH64_SSHLLv4i32_shift |
| 4516 | AARCH64_INS_ALIAS_UXTL_8H, // Real instr.: AARCH64_USHLLv8i8_shift |
| 4517 | AARCH64_INS_ALIAS_UXTL, // Real instr.: AARCH64_USHLLv8i8_shift |
| 4518 | AARCH64_INS_ALIAS_UXTL_4S, // Real instr.: AARCH64_USHLLv4i16_shift |
| 4519 | AARCH64_INS_ALIAS_UXTL_2D, // Real instr.: AARCH64_USHLLv2i32_shift |
| 4520 | AARCH64_INS_ALIAS_UXTL2_8H, // Real instr.: AARCH64_USHLLv16i8_shift |
| 4521 | AARCH64_INS_ALIAS_UXTL2, // Real instr.: AARCH64_USHLLv16i8_shift |
| 4522 | AARCH64_INS_ALIAS_UXTL2_4S, // Real instr.: AARCH64_USHLLv8i16_shift |
| 4523 | AARCH64_INS_ALIAS_UXTL2_2D, // Real instr.: AARCH64_USHLLv4i32_shift |
| 4524 | AARCH64_INS_ALIAS_LD2, // Real instr.: AARCH64_LD2Twov16b_POST |
| 4525 | AARCH64_INS_ALIAS_LD3, // Real instr.: AARCH64_LD3Threev16b_POST |
| 4526 | AARCH64_INS_ALIAS_LD4, // Real instr.: AARCH64_LD4Fourv16b_POST |
| 4527 | AARCH64_INS_ALIAS_ST1, // Real instr.: AARCH64_ST1Onev16b_POST |
| 4528 | AARCH64_INS_ALIAS_ST2, // Real instr.: AARCH64_ST2Twov16b_POST |
| 4529 | AARCH64_INS_ALIAS_ST3, // Real instr.: AARCH64_ST3Threev16b_POST |
| 4530 | AARCH64_INS_ALIAS_ST4, // Real instr.: AARCH64_ST4Fourv16b_POST |
| 4531 | AARCH64_INS_ALIAS_LD2R, // Real instr.: AARCH64_LD2Rv8b_POST |
| 4532 | AARCH64_INS_ALIAS_LD3R, // Real instr.: AARCH64_LD3Rv8b_POST |
| 4533 | AARCH64_INS_ALIAS_LD4R, // Real instr.: AARCH64_LD4Rv8b_POST |
| 4534 | AARCH64_INS_ALIAS_CLRBHB, // Real instr.: AARCH64_HINT |
| 4535 | AARCH64_INS_ALIAS_STILP, // Real instr.: AARCH64_STILPW |
| 4536 | AARCH64_INS_ALIAS_STL1, // Real instr.: AARCH64_STL1 |
| 4537 | AARCH64_INS_ALIAS_SYSP, // Real instr.: AARCH64_SYSPxt_XZR |
| 4538 | AARCH64_INS_ALIAS_LD1SW, // Real instr.: AARCH64_LD1SW_D_IMM |
| 4539 | AARCH64_INS_ALIAS_LD1H, // Real instr.: AARCH64_LD1H_IMM |
| 4540 | AARCH64_INS_ALIAS_LD1SH, // Real instr.: AARCH64_LD1SH_D_IMM |
| 4541 | AARCH64_INS_ALIAS_LD1D, // Real instr.: AARCH64_LD1D_IMM |
| 4542 | AARCH64_INS_ALIAS_LD1RSW, // Real instr.: AARCH64_LD1RSW_IMM |
| 4543 | AARCH64_INS_ALIAS_LD1RH, // Real instr.: AARCH64_LD1RH_IMM |
| 4544 | AARCH64_INS_ALIAS_LD1RSH, // Real instr.: AARCH64_LD1RSH_D_IMM |
| 4545 | AARCH64_INS_ALIAS_LD1RW, // Real instr.: AARCH64_LD1RW_IMM |
| 4546 | AARCH64_INS_ALIAS_LD1RSB, // Real instr.: AARCH64_LD1RSB_D_IMM |
| 4547 | AARCH64_INS_ALIAS_LD1RD, // Real instr.: AARCH64_LD1RD_IMM |
| 4548 | AARCH64_INS_ALIAS_LD1RQH, // Real instr.: AARCH64_LD1RQ_H_IMM |
| 4549 | AARCH64_INS_ALIAS_LD1RQW, // Real instr.: AARCH64_LD1RQ_W_IMM |
| 4550 | AARCH64_INS_ALIAS_LD1RQD, // Real instr.: AARCH64_LD1RQ_D_IMM |
| 4551 | AARCH64_INS_ALIAS_LDNF1SW, // Real instr.: AARCH64_LDNF1SW_D_IMM_REAL |
| 4552 | AARCH64_INS_ALIAS_LDNF1H, // Real instr.: AARCH64_LDNF1H_IMM_REAL |
| 4553 | AARCH64_INS_ALIAS_LDNF1SH, // Real instr.: AARCH64_LDNF1SH_D_IMM_REAL |
| 4554 | AARCH64_INS_ALIAS_LDNF1W, // Real instr.: AARCH64_LDNF1W_IMM_REAL |
| 4555 | AARCH64_INS_ALIAS_LDNF1SB, // Real instr.: AARCH64_LDNF1SB_D_IMM_REAL |
| 4556 | AARCH64_INS_ALIAS_LDNF1D, // Real instr.: AARCH64_LDNF1D_IMM_REAL |
| 4557 | AARCH64_INS_ALIAS_LDFF1SW, // Real instr.: AARCH64_LDFF1SW_D_REAL |
| 4558 | AARCH64_INS_ALIAS_LDFF1H, // Real instr.: AARCH64_LDFF1H_REAL |
| 4559 | AARCH64_INS_ALIAS_LDFF1SH, // Real instr.: AARCH64_LDFF1SH_D_REAL |
| 4560 | AARCH64_INS_ALIAS_LDFF1W, // Real instr.: AARCH64_LDFF1W_REAL |
| 4561 | AARCH64_INS_ALIAS_LDFF1SB, // Real instr.: AARCH64_LDFF1SB_D_REAL |
| 4562 | AARCH64_INS_ALIAS_LDFF1D, // Real instr.: AARCH64_LDFF1D_REAL |
| 4563 | AARCH64_INS_ALIAS_LD3B, // Real instr.: AARCH64_LD3B_IMM |
| 4564 | AARCH64_INS_ALIAS_LD4B, // Real instr.: AARCH64_LD4B_IMM |
| 4565 | AARCH64_INS_ALIAS_LD2H, // Real instr.: AARCH64_LD2H_IMM |
| 4566 | AARCH64_INS_ALIAS_LD3H, // Real instr.: AARCH64_LD3H_IMM |
| 4567 | AARCH64_INS_ALIAS_LD4H, // Real instr.: AARCH64_LD4H_IMM |
| 4568 | AARCH64_INS_ALIAS_LD2W, // Real instr.: AARCH64_LD2W_IMM |
| 4569 | AARCH64_INS_ALIAS_LD3W, // Real instr.: AARCH64_LD3W_IMM |
| 4570 | AARCH64_INS_ALIAS_LD4W, // Real instr.: AARCH64_LD4W_IMM |
| 4571 | AARCH64_INS_ALIAS_LD2D, // Real instr.: AARCH64_LD2D_IMM |
| 4572 | AARCH64_INS_ALIAS_LD3D, // Real instr.: AARCH64_LD3D_IMM |
| 4573 | AARCH64_INS_ALIAS_LD4D, // Real instr.: AARCH64_LD4D_IMM |
| 4574 | AARCH64_INS_ALIAS_LD2Q, // Real instr.: AARCH64_LD2Q_IMM |
| 4575 | AARCH64_INS_ALIAS_LD3Q, // Real instr.: AARCH64_LD3Q_IMM |
| 4576 | AARCH64_INS_ALIAS_LD4Q, // Real instr.: AARCH64_LD4Q_IMM |
| 4577 | AARCH64_INS_ALIAS_LDNT1H, // Real instr.: AARCH64_LDNT1H_ZRI |
| 4578 | AARCH64_INS_ALIAS_LDNT1W, // Real instr.: AARCH64_LDNT1W_ZRI |
| 4579 | AARCH64_INS_ALIAS_LDNT1D, // Real instr.: AARCH64_LDNT1D_ZRI |
| 4580 | AARCH64_INS_ALIAS_ST1H, // Real instr.: AARCH64_ST1H_IMM |
| 4581 | AARCH64_INS_ALIAS_ST1W, // Real instr.: AARCH64_ST1W_IMM |
| 4582 | AARCH64_INS_ALIAS_ST1D, // Real instr.: AARCH64_ST1D_IMM |
| 4583 | AARCH64_INS_ALIAS_ST3B, // Real instr.: AARCH64_ST3B_IMM |
| 4584 | AARCH64_INS_ALIAS_ST4B, // Real instr.: AARCH64_ST4B_IMM |
| 4585 | AARCH64_INS_ALIAS_ST2H, // Real instr.: AARCH64_ST2H_IMM |
| 4586 | AARCH64_INS_ALIAS_ST3H, // Real instr.: AARCH64_ST3H_IMM |
| 4587 | AARCH64_INS_ALIAS_ST4H, // Real instr.: AARCH64_ST4H_IMM |
| 4588 | AARCH64_INS_ALIAS_ST2W, // Real instr.: AARCH64_ST2W_IMM |
| 4589 | AARCH64_INS_ALIAS_ST3W, // Real instr.: AARCH64_ST3W_IMM |
| 4590 | AARCH64_INS_ALIAS_ST4W, // Real instr.: AARCH64_ST4W_IMM |
| 4591 | AARCH64_INS_ALIAS_ST2D, // Real instr.: AARCH64_ST2D_IMM |
| 4592 | AARCH64_INS_ALIAS_ST3D, // Real instr.: AARCH64_ST3D_IMM |
| 4593 | AARCH64_INS_ALIAS_ST4D, // Real instr.: AARCH64_ST4D_IMM |
| 4594 | AARCH64_INS_ALIAS_ST3Q, // Real instr.: AARCH64_ST3Q_IMM |
| 4595 | AARCH64_INS_ALIAS_ST4Q, // Real instr.: AARCH64_ST4Q_IMM |
| 4596 | AARCH64_INS_ALIAS_STNT1H, // Real instr.: AARCH64_STNT1H_ZRI |
| 4597 | AARCH64_INS_ALIAS_STNT1W, // Real instr.: AARCH64_STNT1W_ZRI |
| 4598 | AARCH64_INS_ALIAS_STNT1D, // Real instr.: AARCH64_STNT1D_ZRI |
| 4599 | AARCH64_INS_ALIAS_PRFH, // Real instr.: AARCH64_PRFH_PRI |
| 4600 | AARCH64_INS_ALIAS_PRFW, // Real instr.: AARCH64_PRFW_PRI |
| 4601 | AARCH64_INS_ALIAS_PRFD, // Real instr.: AARCH64_PRFD_PRI |
| 4602 | AARCH64_INS_ALIAS_CNTH, // Real instr.: AARCH64_CNTH_XPiI |
| 4603 | AARCH64_INS_ALIAS_CNTW, // Real instr.: AARCH64_CNTW_XPiI |
| 4604 | AARCH64_INS_ALIAS_CNTD, // Real instr.: AARCH64_CNTD_XPiI |
| 4605 | AARCH64_INS_ALIAS_DECB, // Real instr.: AARCH64_DECB_XPiI |
| 4606 | AARCH64_INS_ALIAS_INCH, // Real instr.: AARCH64_INCH_XPiI |
| 4607 | AARCH64_INS_ALIAS_DECH, // Real instr.: AARCH64_DECH_XPiI |
| 4608 | AARCH64_INS_ALIAS_INCW, // Real instr.: AARCH64_INCW_XPiI |
| 4609 | AARCH64_INS_ALIAS_DECW, // Real instr.: AARCH64_DECW_XPiI |
| 4610 | AARCH64_INS_ALIAS_INCD, // Real instr.: AARCH64_INCD_XPiI |
| 4611 | AARCH64_INS_ALIAS_DECD, // Real instr.: AARCH64_DECD_XPiI |
| 4612 | AARCH64_INS_ALIAS_SQDECB, // Real instr.: AARCH64_SQDECB_XPiWdI |
| 4613 | AARCH64_INS_ALIAS_UQDECB, // Real instr.: AARCH64_UQDECB_WPiI |
| 4614 | AARCH64_INS_ALIAS_UQINCH, // Real instr.: AARCH64_UQINCH_WPiI |
| 4615 | AARCH64_INS_ALIAS_SQDECH, // Real instr.: AARCH64_SQDECH_XPiWdI |
| 4616 | AARCH64_INS_ALIAS_UQDECH, // Real instr.: AARCH64_UQDECH_WPiI |
| 4617 | AARCH64_INS_ALIAS_SQINCW, // Real instr.: AARCH64_SQINCW_XPiWdI |
| 4618 | AARCH64_INS_ALIAS_UQINCW, // Real instr.: AARCH64_UQINCW_WPiI |
| 4619 | AARCH64_INS_ALIAS_SQDECW, // Real instr.: AARCH64_SQDECW_XPiWdI |
| 4620 | AARCH64_INS_ALIAS_UQDECW, // Real instr.: AARCH64_UQDECW_WPiI |
| 4621 | AARCH64_INS_ALIAS_SQINCD, // Real instr.: AARCH64_SQINCD_XPiWdI |
| 4622 | AARCH64_INS_ALIAS_UQINCD, // Real instr.: AARCH64_UQINCD_WPiI |
| 4623 | AARCH64_INS_ALIAS_SQDECD, // Real instr.: AARCH64_SQDECD_XPiWdI |
| 4624 | AARCH64_INS_ALIAS_UQDECD, // Real instr.: AARCH64_UQDECD_WPiI |
| 4625 | AARCH64_INS_ALIAS_MOVS, // Real instr.: AARCH64_ORRS_PPzPP |
| 4626 | AARCH64_INS_ALIAS_NOT, // Real instr.: AARCH64_EOR_PPzPP |
| 4627 | AARCH64_INS_ALIAS_NOTS, // Real instr.: AARCH64_EORS_PPzPP |
| 4628 | AARCH64_INS_ALIAS_LD1ROH, // Real instr.: AARCH64_LD1RO_H_IMM |
| 4629 | AARCH64_INS_ALIAS_LD1ROW, // Real instr.: AARCH64_LD1RO_W_IMM |
| 4630 | AARCH64_INS_ALIAS_LD1ROD, // Real instr.: AARCH64_LD1RO_D_IMM |
| 4631 | AARCH64_INS_ALIAS_BCAX, // Real instr.: AARCH64_BCAX_ZZZZ |
| 4632 | AARCH64_INS_ALIAS_BSL, // Real instr.: AARCH64_BSL_ZZZZ |
| 4633 | AARCH64_INS_ALIAS_BSL1N, // Real instr.: AARCH64_BSL1N_ZZZZ |
| 4634 | AARCH64_INS_ALIAS_BSL2N, // Real instr.: AARCH64_BSL2N_ZZZZ |
| 4635 | AARCH64_INS_ALIAS_NBSL, // Real instr.: AARCH64_NBSL_ZZZZ |
| 4636 | AARCH64_INS_ALIAS_LDNT1SH, // Real instr.: AARCH64_LDNT1SH_ZZR_S_REAL |
| 4637 | AARCH64_INS_ALIAS_LDNT1SW, // Real instr.: AARCH64_LDNT1SW_ZZR_D_REAL |
| 4638 | |
| 4639 | // clang-format on |
| 4640 | // generated content <AArch64GenCSAliasEnum.inc> end |
| 4641 | |
| 4642 | // Hardcoded in LLVM printer |
| 4643 | AARCH64_INS_ALIAS_CFP, |
| 4644 | AARCH64_INS_ALIAS_DVP, |
| 4645 | AARCH64_INS_ALIAS_COSP, |
| 4646 | AARCH64_INS_ALIAS_CPP, |
| 4647 | AARCH64_INS_ALIAS_IC, |
| 4648 | AARCH64_INS_ALIAS_DC, |
| 4649 | AARCH64_INS_ALIAS_AT, |
| 4650 | AARCH64_INS_ALIAS_TLBI, |
| 4651 | AARCH64_INS_ALIAS_TLBIP, |
| 4652 | AARCH64_INS_ALIAS_RPRFM, |
| 4653 | AARCH64_INS_ALIAS_LSL, |
| 4654 | AARCH64_INS_ALIAS_SBFX, |
| 4655 | AARCH64_INS_ALIAS_UBFX, |
| 4656 | AARCH64_INS_ALIAS_SBFIZ, |
| 4657 | AARCH64_INS_ALIAS_UBFIZ, |
| 4658 | AARCH64_INS_ALIAS_BFC, |
| 4659 | AARCH64_INS_ALIAS_BFI, |
| 4660 | AARCH64_INS_ALIAS_BFXIL, |
| 4661 | |
| 4662 | AARCH64_INS_ALIAS_END, |
| 4663 | } aarch64_insn; |
| 4664 | |
| 4665 | /// Group of AArch64 instructions |
| 4666 | typedef enum aarch64_insn_group { |
| 4667 | AARCH64_GRP_INVALID = 0, ///< = CS_GRP_INVALID |
| 4668 | |
| 4669 | // Generic groups |
| 4670 | // all jump instructions (conditional+direct+indirect jumps) |
| 4671 | AARCH64_GRP_JUMP, ///< = CS_GRP_JUMP |
| 4672 | AARCH64_GRP_CALL, |
| 4673 | AARCH64_GRP_RET, |
| 4674 | AARCH64_GRP_INT, |
| 4675 | AARCH64_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE |
| 4676 | AARCH64_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE |
| 4677 | // generated content <AArch64GenCSFeatureEnum.inc> begin |
| 4678 | // clang-format off |
| 4679 | |
| 4680 | AARCH64_FEATURE_HASV8_0A = 128, |
| 4681 | AARCH64_FEATURE_HASV8_1A, |
| 4682 | AARCH64_FEATURE_HASV8_2A, |
| 4683 | AARCH64_FEATURE_HASV8_3A, |
| 4684 | AARCH64_FEATURE_HASV8_4A, |
| 4685 | AARCH64_FEATURE_HASV8_5A, |
| 4686 | AARCH64_FEATURE_HASV8_6A, |
| 4687 | AARCH64_FEATURE_HASV8_7A, |
| 4688 | AARCH64_FEATURE_HASV8_8A, |
| 4689 | AARCH64_FEATURE_HASV8_9A, |
| 4690 | AARCH64_FEATURE_HASV9_0A, |
| 4691 | AARCH64_FEATURE_HASV9_1A, |
| 4692 | AARCH64_FEATURE_HASV9_2A, |
| 4693 | AARCH64_FEATURE_HASV9_3A, |
| 4694 | AARCH64_FEATURE_HASV9_4A, |
| 4695 | AARCH64_FEATURE_HASV8_0R, |
| 4696 | AARCH64_FEATURE_HASEL2VMSA, |
| 4697 | AARCH64_FEATURE_HASEL3, |
| 4698 | AARCH64_FEATURE_HASVH, |
| 4699 | AARCH64_FEATURE_HASLOR, |
| 4700 | AARCH64_FEATURE_HASPAUTH, |
| 4701 | AARCH64_FEATURE_HASPAUTHLR, |
| 4702 | AARCH64_FEATURE_HASJS, |
| 4703 | AARCH64_FEATURE_HASCCIDX, |
| 4704 | AARCH64_FEATURE_HASCOMPLXNUM, |
| 4705 | AARCH64_FEATURE_HASNV, |
| 4706 | AARCH64_FEATURE_HASMPAM, |
| 4707 | AARCH64_FEATURE_HASDIT, |
| 4708 | AARCH64_FEATURE_HASTRACEV8_4, |
| 4709 | AARCH64_FEATURE_HASAM, |
| 4710 | AARCH64_FEATURE_HASSEL2, |
| 4711 | AARCH64_FEATURE_HASTLB_RMI, |
| 4712 | AARCH64_FEATURE_HASFLAGM, |
| 4713 | AARCH64_FEATURE_HASRCPC_IMMO, |
| 4714 | AARCH64_FEATURE_HASFPARMV8, |
| 4715 | AARCH64_FEATURE_HASNEON, |
| 4716 | AARCH64_FEATURE_HASSM4, |
| 4717 | AARCH64_FEATURE_HASSHA3, |
| 4718 | AARCH64_FEATURE_HASSHA2, |
| 4719 | AARCH64_FEATURE_HASAES, |
| 4720 | AARCH64_FEATURE_HASDOTPROD, |
| 4721 | AARCH64_FEATURE_HASCRC, |
| 4722 | AARCH64_FEATURE_HASCSSC, |
| 4723 | AARCH64_FEATURE_HASLSE, |
| 4724 | AARCH64_FEATURE_HASRAS, |
| 4725 | AARCH64_FEATURE_HASRDM, |
| 4726 | AARCH64_FEATURE_HASFULLFP16, |
| 4727 | AARCH64_FEATURE_HASFP16FML, |
| 4728 | AARCH64_FEATURE_HASSPE, |
| 4729 | AARCH64_FEATURE_HASFUSEAES, |
| 4730 | AARCH64_FEATURE_HASSVE, |
| 4731 | AARCH64_FEATURE_HASSVE2, |
| 4732 | AARCH64_FEATURE_HASSVE2P1, |
| 4733 | AARCH64_FEATURE_HASSVE2AES, |
| 4734 | AARCH64_FEATURE_HASSVE2SM4, |
| 4735 | AARCH64_FEATURE_HASSVE2SHA3, |
| 4736 | AARCH64_FEATURE_HASSVE2BITPERM, |
| 4737 | AARCH64_FEATURE_HASB16B16, |
| 4738 | AARCH64_FEATURE_HASSME, |
| 4739 | AARCH64_FEATURE_HASSMEF64F64, |
| 4740 | AARCH64_FEATURE_HASSMEF16F16, |
| 4741 | AARCH64_FEATURE_HASSMEFA64, |
| 4742 | AARCH64_FEATURE_HASSMEI16I64, |
| 4743 | AARCH64_FEATURE_HASSME2, |
| 4744 | AARCH64_FEATURE_HASSME2P1, |
| 4745 | AARCH64_FEATURE_HASFPMR, |
| 4746 | AARCH64_FEATURE_HASFP8, |
| 4747 | AARCH64_FEATURE_HASFAMINMAX, |
| 4748 | AARCH64_FEATURE_HASFP8FMA, |
| 4749 | AARCH64_FEATURE_HASSSVE_FP8FMA, |
| 4750 | AARCH64_FEATURE_HASFP8DOT2, |
| 4751 | AARCH64_FEATURE_HASSSVE_FP8DOT2, |
| 4752 | AARCH64_FEATURE_HASFP8DOT4, |
| 4753 | AARCH64_FEATURE_HASSSVE_FP8DOT4, |
| 4754 | AARCH64_FEATURE_HASLUT, |
| 4755 | AARCH64_FEATURE_HASSME_LUTV2, |
| 4756 | AARCH64_FEATURE_HASSMEF8F16, |
| 4757 | AARCH64_FEATURE_HASSMEF8F32, |
| 4758 | AARCH64_FEATURE_HASSVEORSME, |
| 4759 | AARCH64_FEATURE_HASSVE2ORSME, |
| 4760 | AARCH64_FEATURE_HASSVE2ORSME2, |
| 4761 | AARCH64_FEATURE_HASSVE2P1_OR_HASSME, |
| 4762 | AARCH64_FEATURE_HASSVE2P1_OR_HASSME2, |
| 4763 | AARCH64_FEATURE_HASSVE2P1_OR_HASSME2P1, |
| 4764 | AARCH64_FEATURE_HASNEONORSME, |
| 4765 | AARCH64_FEATURE_HASRCPC, |
| 4766 | AARCH64_FEATURE_HASALTNZCV, |
| 4767 | AARCH64_FEATURE_HASFRINT3264, |
| 4768 | AARCH64_FEATURE_HASSB, |
| 4769 | AARCH64_FEATURE_HASPREDRES, |
| 4770 | AARCH64_FEATURE_HASCCDP, |
| 4771 | AARCH64_FEATURE_HASBTI, |
| 4772 | AARCH64_FEATURE_HASMTE, |
| 4773 | AARCH64_FEATURE_HASTME, |
| 4774 | AARCH64_FEATURE_HASETE, |
| 4775 | AARCH64_FEATURE_HASTRBE, |
| 4776 | AARCH64_FEATURE_HASBF16, |
| 4777 | AARCH64_FEATURE_HASMATMULINT8, |
| 4778 | AARCH64_FEATURE_HASMATMULFP32, |
| 4779 | AARCH64_FEATURE_HASMATMULFP64, |
| 4780 | AARCH64_FEATURE_HASXS, |
| 4781 | AARCH64_FEATURE_HASWFXT, |
| 4782 | AARCH64_FEATURE_HASLS64, |
| 4783 | AARCH64_FEATURE_HASBRBE, |
| 4784 | AARCH64_FEATURE_HASSPE_EEF, |
| 4785 | AARCH64_FEATURE_HASHBC, |
| 4786 | AARCH64_FEATURE_HASMOPS, |
| 4787 | AARCH64_FEATURE_HASCLRBHB, |
| 4788 | AARCH64_FEATURE_HASSPECRES2, |
| 4789 | AARCH64_FEATURE_HASITE, |
| 4790 | AARCH64_FEATURE_HASTHE, |
| 4791 | AARCH64_FEATURE_HASRCPC3, |
| 4792 | AARCH64_FEATURE_HASLSE128, |
| 4793 | AARCH64_FEATURE_HASD128, |
| 4794 | AARCH64_FEATURE_HASCHK, |
| 4795 | AARCH64_FEATURE_HASGCS, |
| 4796 | AARCH64_FEATURE_HASCPA, |
| 4797 | AARCH64_FEATURE_USENEGATIVEIMMEDIATES, |
| 4798 | AARCH64_FEATURE_HASCCPP, |
| 4799 | AARCH64_FEATURE_HASPAN, |
| 4800 | AARCH64_FEATURE_HASPSUAO, |
| 4801 | AARCH64_FEATURE_HASPAN_RWV, |
| 4802 | AARCH64_FEATURE_HASCONTEXTIDREL2, |
| 4803 | |
| 4804 | // clang-format on |
| 4805 | // generated content <AArch64GenCSFeatureEnum.inc> end |
| 4806 | |
| 4807 | AARCH64_GRP_ENDING, // <-- mark the end of the list of groups |
| 4808 | } aarch64_insn_group; |
| 4809 | |
| 4810 | #ifdef __cplusplus |
| 4811 | } |
| 4812 | #endif |
| 4813 | |
| 4814 | #endif |
| 4815 |